Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Reexamination Certificate
2002-12-06
2004-04-20
Zarabian, Amir (Department: 2822)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
C438S435000, C438S437000, C438S700000, C438S735000, C438S739000, C438S740000
Reexamination Certificate
active
06723617
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates generally to a method of manufacturing a semiconductor device. More particularly, the invention relates to a method of manufacturing a semiconductor device capable of improving a characteristic of the device and reducing the manufacture cost, by preventing formation of a moat generating around the top corner of a trench having a STI (shallow trench isolation) structure.
2. Description of the Prior Art
Generally, in order to isolate between-semiconductor devices, the semiconductor substrate is defined into an active region and a field region. Next, a semiconductor device is formed in the active region and a device isolation film for isolation the devices is formed in the field region.
A method for forming the device isolation film of the semiconductor device includes one by which a trench of a STI (shallow trench isolation) structure is formed and the device isolation film for isolating the devices is them. The method by which the trench of the STI structure is formed to isolate the devices will be described in short. A silicon substrate in the field region is etched by a depth of about 3500 Å to form the trench. A high-density plasma (HDP) oxide film is then deposited. Next, the oxide film is polished by a chemical mechanical polishing (CMP) process.
FIG. 1
is a TEM (transmission electron microscope) photography of the semiconductor device in which the device isolation film is formed according to a prior art.
Referring now to
FIG. 1
, in the conventional technology of forming the device isolation film having the STI structure, a moat (see portion ‘M’ in
FIG. 1
) is formed at a field oxide film where the active region and the field region meet by means of a pre-cleaning process for forming a gate oxide film, a subsequent cleaning process and an etch process for the oxide film. Due to this, a parasitic effect, degradation in gate oxide integrity (GOI), an inverse narrow effect and a sub-threshold hump phenomenon occur.
Further, there are many problems in proceeding subsequent processes. If the gate oxide film is deposited, the gate oxide film at the top corner of the trench is made thin by the moat of the HDP oxide film. This may cause a breakdown when the voltage is applied to the device.
Also, after a polysilicon layer is deposited, the moat that is concaved is formed even at the polysilicon layer at the boundary of the active region and the field region. It makes it difficult to remove polysilicon at this portion. Thus, a gate bridge may be caused due to remaining polysilicon.
In addition, if the CMP process is performed with polysilicon concaved, CMP could not be performed uniformly due to the step of polysilicon. Thus, it makes it difficult to form the gate electrodes of the same shape. In case of the flash device, there is difference in the coupling ratio between the gate electrodes. Due to this, there is a problem that the characteristic of the semiconductor device is degraded.
SUMMARY OF THE INVENTION
The present invention is contrived to solve the above problems and an object of the present invention is to provide a method of manufacturing a semiconductor device capable of preventing generation of a moat, in such a way that a thickness of a pad oxide film is formed by minimum to an extent that stress between a semiconductor substrate and a pad nitride film is mitigated and before a HDP oxide film is deposited, a portion of the pad nitride film is etched to compensate for a portion recessed in a cleaning process.
In order to accomplish the above object, the method of manufacturing a semiconductor device according to the present invention, is characterized in that it comprises the steps of sequentially forming a pad oxide film, a pad nitride film and a screen oxide film on a semiconductor substrate in which an active region and a field region are defined, removing the screen oxide film and the pad nitride film formed in the field region, performing a wet etch process to remove the pad nitride film exposed at the boundary of the active region and the field region, in a lateral direction by a given width, performing a dry etch process using the screen oxide film and an etch mask to remove portions of the pad oxide film and the semiconductor substrate formed in the field region, thus forming a trench, removing the screen oxide film and the pad nitride film in the lateral direction by a given width and simultaneously removing the exposed portion of the pad oxide film, performing an oxidization process to form a rounding oxide film in the exposed portion of the semiconductor substrate, depositing a field oxide film of a thickness by which the trench is sufficiently buried and then polishing the field oxide film, and removing the pad nitride film and the pad oxide film in the active region.
REFERENCES:
patent: 6080637 (2000-06-01), Huang et al.
Seok-Woo Lee, et al.; Gate Oxide Thinning Effects at the Edge of Shallow Trench Isolation in the Dual Gate Oxide Process; 1999 IEEE; pp. 249-252.
K. Horita, et al.; Advanced Shallow Trench Isolation to Suppress the Inverse Narrow Channel Effects for 0.24&mgr;m Pitch Isolation and Beyond; 2000 IEEE; pp. 178-179.
Hynix / Semiconductor Inc.
Jacobson & Holman PLLC
Thomas Toniae M.
Zarabian Amir
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