Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Patent
1997-04-23
1999-03-02
Dang, Trung
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
438431, 438432, 438425, 438361, 148DIG50, H01L 2176
Patent
active
058770674
ABSTRACT:
The present invention provides a method of manufacturing a semiconductor device to prevent the generation of crystalline defects due to shorting between interconnects resulting from etch residue as a result of the generation of vertical bird's beaks on top of the trench during field oxidation layer formation. The method includes forming an epitaxial layer over a semiconductor substrate, depositing a first SiO.sub.2 layer, an SiN layer and a second SiO.sub.2 layer in that order upon said epitaxial layer and forming a trench from the second SiO.sub.2 layer extending into the semiconductor substrate. A third SiO.sub.2 layer is formed coating said trench with a region of said third Si0.sub.2 layer removed adjacent to said first SiO.sub.2 layer to expose a portion of said epitaxial layer within said trench. The trench is then filled with a first polysilicon layer to coat the third SiO.sub.2 layer and the first SiO.sub.2 layer followed by removal of the second SiO.sub.2 layer and the SiN layer and finally, the first SiO.sub.2 layer is oxidized to a depth extending into the trench corresponding to the exposed portion of the epitaxial layer so as to form a field oxide layer.
REFERENCES:
patent: 4631803 (1986-12-01), Hunter et al.
patent: 5358891 (1994-10-01), Tsang et al.
patent: 5474953 (1995-12-01), Shimizu et al.
patent: 5561073 (1996-10-01), Jerome et al.
Kimura Koji
Nakashima Yuichi
Okamoto Rintarou
Dang Trung
Kabushiki Kaisha Toshiba
Meller Michael N.
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