Abrading – Abrading process – Utilizing fluent abradant
Reexamination Certificate
2000-09-21
2003-01-21
Niebling, John F. (Department: 2812)
Abrading
Abrading process
Utilizing fluent abradant
C438S942000
Reexamination Certificate
active
06508693
ABSTRACT:
BACKGROUND OF THE INVENTION
The invention relates to a method of manufacturing a semiconductor device having a semiconductor body comprising a monocrystalline semiconductor substrate of silicon the surface of which has a crystal orientation, in which semiconductor substrate a semiconductor element is formed, and the surface of the semiconductor body is covered with a mask pattern, after which a part of the semiconductor body is removed by means of powder blasting.
Such a method is employed, for example, in the manufacture of (discrete) diodes. An important advantage of this method resides in that it is comparatively clean and inexpensive, and in that it is extremely suited for mass-production.
Such a method is known from U.S. Pat. No. 3,693,302, published on Sep. 26, 1972. Said patent specification shows how a silicon substrate, which comprises a pn-junction, is placed on a carrier, after which a mask pattern is provided on the substrate. Parts of the silicon semiconductor body situated between the mask pattern are then removed by means of powder blasting, in which process individual semiconductor elements, in this case semiconductor diodes, are formed as mesa-shaped parts. After a possible passivation of the edges of the mesa, individual diodes can be detached from the carrier and are ready for processing.
A drawback of the known method resides in that the I-V (=Current-Voltage) characteristic of the diodes obtained is not always good enough and, in addition, is insufficiently reproducible.
SUMMARY OF THE INVENTION
Therefore, it is an object of the invention to provide a method which results in diodes having a good I-V characteristic which is readily reproducible.
To achieve this, in accordance with the invention, a method of the type mentioned in the opening paragraph is characterized in that the (111) crystal orientation is chosen as the crystal orientation of the substrate, and the longitudinal direction of the mask pattern is aligned with respect to the (111) crystal orientation of the substrate in such a way that the removed part of the semiconductor body has a symmetric profile when viewed in cross-section. The invention is based on the following recognitions. First of all, that silicon with a (111) crystal orientation i.e. the surface of the substrate lies in a (111) plane, can very suitably be used for the manufacture of, in particular, discrete semiconductor devices such as diodes, which are obtained as mesa-shaped diodes (akkoord ?, zie Ned. Tekst blz. 2, r. 3). The invention is further based on the recognition that the quality of the I-V characteristic of such devices, which is not high and insufficiently reproducible, is caused by crystal damage at the side faces of a mesa-shaped diode, particularly at the location where a pn-junction of the device is exposed, which damage is caused by powder blasting. Surprisingly, it has been found that greater symmetry of the profile formed by removing a part of the semiconductor body situated next to the mesa to be formed results in less damage to and a higher quality of the devices obtained and in a better reproducibility of the manufacturing process. Finally, the invention is based on the recognition that a more symmetrical profile of the removed part of the semiconductor body can be achieved if, contrary to what is customary, the mask pattern used in the manufacture is not randomly provided on the semiconductor body but instead is provided so as to be aligned in a specific way on the (111) crystal orientation of the substrate.
It has been found in experiments that if the longitudinal direction of the mask pattern includes an angle (60) of approximately 30 degrees (plus or minus an integral number of times 60 degrees) with a projected (110) or (100) direction of the (111) silicon, the above-mentioned symmetrical profile is obtained over a substantial part of the circumference (particularly the part of the circumference where the distance to an adjacent diodes is smallest) of the device to be formed. A noticeable improvement is achieved already if said angle lies in the range between 20 and 40 degrees. The improvement is substantially maximal if said angle lies in the range between 28 and 32 degrees. Such an alignment accuracy can be readily achieved in practice, i.e. without additional measures in a customary photolithographic process.
In a particularly favorable embodiment, in which a mesa-shaped body is formed from the semiconductor body, is characterized in that the mask pattern is formed by a number of rows of sub-masks, with two adjacent rows being shifted with respect to each other over half the distance between two sub-masks. In this manner, a large number of semiconductor elements can be manufactured from the semiconductor body. When the mask pattern is built up of round spots, the mask pattern of this embodiment looks like a close sphere packing when viewed in projection. In a further favorable variant, the sub-masks are provided with the shape of a regular hexagon. In this variant, the material loss is minimal. In addition, also this variant results in a symmetrical profile of the removed part of the semiconductor body substantially throughout the circumference of the semiconductor element to be formed. Only at the six angular points, the above-mentioned profile is still slightly asymmetrical.
Optimum results are achieved if the ratio of the width of the removed part of the semiconductor body to the thickness of the removed part of the semiconductor body is chosen to be in the range between 3 and 1/3, and preferably between 2 and 1/2. Below the lower limit of the first-mentioned range, the process takes up too much time, while above the upper limit of said range, too much loss of material occurs. In the last-mentioned range, optimum results are achieved as regards the symmetry of the profile of the removed part of the semiconductor body. In this range, the risk that a powder particle is repeatedly incident on the semiconductor body is minimal. It has been found that such repeated incidence leads to an increase of the asymmetry of the profile of the removed part of the semiconductor body.
Although a method in accordance with the invention can also be used in the manufacture of an IC (Integrated Circuit), it is particularly suited to manufacture discrete semiconductor elements, such as diodes. By providing the substrate with a facet which lies in the group of (110) planes, the yield is slightly reduced because the available surface area decreases, but, on the other hand, the alignment necessary for the invention can be readily achieved.
These and other aspects of the invention will be apparent from and elucidated with reference to the embodiments described hereinafter.
REFERENCES:
patent: 3693302 (1972-09-01), Hakes
patent: 6045715 (2000-04-01), Spierings
patent: 6059981 (2000-05-01), Nakasuji
patent: 6067062 (2000-05-01), Takasu
patent: 0690495 (1996-01-01), None
patent: 1527154 (1968-11-01), None
Biren Steven R.
Koninklijke Philips Electronics , N.V.
Niebling John F.
Stevenson Andre′ C
LandOfFree
Method of manufacturing a semiconductor device does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of manufacturing a semiconductor device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of manufacturing a semiconductor device will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3046447