Semiconductor device manufacturing: process – Making device or circuit emissive of nonelectrical signal – Including integrally formed optical element
Reexamination Certificate
2001-05-11
2002-10-08
Chaudhuri, Olik (Department: 2813)
Semiconductor device manufacturing: process
Making device or circuit emissive of nonelectrical signal
Including integrally formed optical element
C438S158000, C438S159000
Reexamination Certificate
active
06461886
ABSTRACT:
TECHNICAL FIELD TO WHICH THE INVENTION BELONGS
The present invention relates to a semiconductor device having a circuit formed of thin film transistors (thereafter, referred to as TFTs) and a method of manufacturing the same. The semiconductor device includes, for example, an electro-optical device such as a liquid crystal display formed of TFTs.
More specifically, the present invention relates to a method of manufacturing a semiconductor device having inverted staggered type TFTs with a bottom gate structure, and more particularly to a photolithography for patterning, the semiconductor device.
PRIOR ART
In recent years, an active matrix liquid crystal display technology using TFTs is of great interest. Since an active matrix display is provided with a TFT switch on each pixel, a liquid crystal orientation state of TN (i.e., twisted nematic) mode is available, and it is advantageous in terms of response speed, viewing angle and contrast, compared with a passive matrix display, it is mainly used in the current liquid crystal display.
In the electro-optical device including such a liquid crystal display with the active matrix display, high definition, high aperture ratio and high reliability, along with enlarging the area of a screen have been greatly required, while low cost along with improvement of the productivity has been further greatly required. In particular, in response to the low cost requirement, an inverted stagger type TFT is widely adopted, which has a bottom gate structure having a channel forming region formed of an amorphous silicon film conventionally capable of being produced on a large area substrate with a low temperature process at 300° C. or less.
The above-mentioned inverted stagger type TFT is basically advantageous of low cost, since a low cost glass substrate and the low temperature process at 300° C. or less are employed. However, since low cost is further required, the improvement of the productivity for attaining the low cost has been considered. Since shortening the process is most effective for improving the productivity, shortening the process has been considered in the industry. Therefore, reducing a photolithography step which is a pattering step, that is, reducing the number of photo masks is considered for shortening the process.
A normal photolithography step using diazo naphthoquinone (DNQ)-Novolac resin based positive photo resist, and an etchings step such as dry etching and wet etching are applied in the patterning step to he reduced.
In the normal photolithography step consisting of a combination of the diazo naphthoquinone (DNQ)-Novolac resin based positive photo resist and a reduction projection exposure apparatus (also referred to as a stepper) which is a single wavelength (g-ray and i-ray of high-pressure mercury-vapor lamp) exposure apparatus, it has been apparent that fluctuation in taper angle of the resist pattern occurs due to variation in size of the resist pattern. Namely, the resist shape of a fine pattern (about 0.3-3 &mgr;m) is a good rectangular pattern, but in a larger pattern (about 10 &mgr;m or more), deformation in the pattern with variation in taper angle occurs on a side wall of the resist shape, and it is observed that the taper angle is reduced (see FIG.
1
).
Since the above phenomenon occurs under a process condition, i.e., pre-bake temperature (90° C. for one minute), followed by PEB (post exposure bake) temperature (110° C. for three minutes) and post-bake temperature (120° C. for four minutes), in which the post-bake temperature after development is higher than the PEB temperature, the phenomenon is considered to be caused due to evacuation of residual solvent from the resist pattern at the post-bake. Also, in a photolithography step without PEB process, it is observed that deformation in the resist pattern due to volume contraction from the resist pattern at the post-bake occurs in the case of large difference between the pre-bake temperature and the post-bake temperature.
In producing the inverted stagger type TFT with a bottom gate structure, while the photolithography step without PEG process is generally adopted, it is not advantageous that as described above, deformation in the resist pattern due to volume contraction at the post-bake occurs. Since various dimensions of circuit patterns exist in a liquid crystal display, deformation in the resist pattern with variation in taper angle depending on variation in the area of the resist pattern influences the etched shape, and thus is a critical problem.
Also, for low cost and enhancement of yield, reduction of the photolithography step is required. In this case, since a plurality of thin film layers are patterned simultaneously using the resist pattern as a mask, variation of the resist pattern side wall taper angle is a critical problem because it is observed that it also greatly influences the etched shape.
In light of the above problem, in a photolithography step which is a patterning step for a semiconductor device having an inverted stagger type TFT, a phenomenon in which the greater the dimension of the photo resist pattern is, the smaller the taper angle on the side wall is, i.e., the area dependence of the photo resist pattern side wall taper angle is worried. The problem of the area dependence of the photo resist pattern side wall taper angle is found in other companies, and the details are disclosed in Japanese Patent Application Laid-open No. Hei 09-54438.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide an semiconductor device formed of inverted stagger type TFTs and a method of manufacturing the same, which can solve the above described problems.
Thus, it is an object of the present invention to solve the area dependence of photo resist pattern side wall taper angle in a photolithography step with diazo naphthoquinone (DNQ)-Novolac resin based positive photo resist. In particular, it is an object of the present invention to the area dependence of the photo resist pattern side wall taper angle in a photolithography step which is a production process of a semiconductor device having inverted stagger type TFTs.
(Means for Solving Photo Resist Pattern Deformation)
First, a description will be made of means for solving resist pattern deformation with variation in taper angle dependent on the pattern area in a photolithography step.
As described above, pattern deformation with variation of side wall taper angle of large area photo resist pattern (about 10 &mgr;m or more) occurred as shown in
FIG. 1
in a photolithography step with diazo naphthoquinone (DNQ)-Novolac resin based positive photo resist. Since this pattern deformation dose not occur in fine pattern (about 3 &mgr;m or less) formed simultaneously, it is observed that the pattern deformation is dependent on the dimension of the photo resist pattern, i.e., the area of the photo resist pattern (see FIG.
1
).
The problem of the area dependence of the photo resist pattern side wall taper angle is found in other companies, and the details are disclosed in Japanese Patent Application Laid-open No. Hei 09-54438.
In patterning the photo resist pattern shown in
FIG. 1
, a reduction projection exposure apparatus is used as an exposure apparatus, in which a single wavelength (specifically, i-ray of an extra high-pressure mercury-vapor lamp) is used for accounting for chromatic aberration. Therefore, PEB process is generally applied between exposure and development because of adverse effect by standing wave due to a single wavelength of the exposed light. This company uses the PEB process in performing a photolithography step using the reduction projection exposure apparatus.
As described above, the photo resist pattern deformation with variation of side wall taper angle occurs in a photolithography step applying the PEB process between exposure and development, i.e., in a sequence of photo processes consisting of a photo resist coating→pre-bake (90° C. for one minute)→exposure (using the reduction projection exposure apparatus)-PEB (110° C. for three minutes)&r
Toshima Kazuhiro
Uehara Ichiro
Chaudhuri Olik
Schillinger Laura
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