Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Assembly of plural semiconductive substrates each possessing...
Reexamination Certificate
2001-07-03
2002-12-03
Elms, Richard (Department: 2824)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Assembly of plural semiconductive substrates each possessing...
C438S106000, C438S118000, C438S127000, C257S668000
Reexamination Certificate
active
06489181
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to a technique of manufacturing a semiconductor device, and more particularly, to a technique effective for application to a semiconductor device wherein semiconductor chips are subjected to flip chip mounting on a wiring board via bump electrodes.
BACKGROUND OF THE INVENTION
In Japanese Laid-open Patent Application No. Hei 11(1999)-297759, there is disclosed a technique wherein in order to permit an appropriate superposed area between an bump electrode and an electrode terminal in case where bump electrodes of a chip and electrode terminals of a substrate are misregistered with each other, the bump electrodes and the electrode terminals are arranged in a zigzag fashion so as to increase the area of individual bump electrodes and electrode terminals.
SUMMARY OF THE INVENTION
We have now developed a multi-chip module mounting a multitude of LSI chips on a printed wiring board. In order to realize high-density packaging of LSI chips, this multi-chip module adopts a flip chip mounting system wherein bump electrodes of Au (gold) (hereinafter referred to simply as Au bumps) formed on a main surface of a chip are individually connected to electrode pads (connection terminals) of a wiring board. Further, for the realization of high reliability at low costs, a so-called anisotropic conductive film (ACE), in which metal particles such as of Ni (nickel) are dispersed in an insulating film made of an epoxy resin, is provided between the chips and the wiring board so as to simultaneously ensure the electric connection between the Au bumps and the electrode pads, the mitigation of thermal stress, and the protection of the connections.
For mounting the chips on the wiring board via the anisotropic conductive film, the anisotropic conductive film, cut about the same size as the chip, is bonded to the electrode pads of the wiring board, and a chip having Au bumps preliminarily formed by use of a wire bonder is mounted on the anisotropic conductive film. Subsequently, the wiring board is heated while applying a compression pressure to the chip from above so that the anisotropic conductive film is melted and cured. Eventually, the Au bumps of the chip and the electrode pads of the wiring board are electrically connected via the metal particles in the film, and the space between the chip and the wiring board is filled up with the cured resin.
When the anisotropic conductive film is thermally treated for the melting and curing, the Au bumps and the electrode pad may be misregistered owing to the difference in coefficient of thermal expansion between the wiring board and the chip (3 ppm for silicon chip and about 14 ppm for a glass fiber-impregnated epoxy resin substrate).
In this connection, if the pitches of the electrode pads are relatively wide, the increase in width of the pads is sufficient to ensure the contact area between the Au bump and the electrode pad even though misregistration between the Au bumps and the electrode pads occurs. However, when the pitches of the electrode pads become narrow with the tendencies toward multiple terminals of a chip and narrow pitches, a difficulty is involved in extending the width of the electrode pad. This results in the misregistration between the Au bumps and the electrode pads, with a small contact area therebetween. Thus, connection reliability inconveniently lowers.
In order to cope with this, it may occur that the printed wiring board is made using a ceramic material whose coefficient of thermal expansion is smaller than resins so that the difference in the coefficient of thermal expansion with the chip is made smaller, with the attendant problem that the production costs of the substrate increases.
An object of the invention is to provide a technique of improving reliability of connection between a chip and a wiring board in a semiconductor device of the type wherein the chip is subjected to flip chip mounting on the wiring board via bump electrodes.
Another object of the invention is to provide a technique of connecting a chip and a wiring board at a high registration accuracy in a semiconductor device wherein the chip is flip-chip-bonded to the wiring board via bump electrodes.
A further object of the invention is to provide a technique of achieving the above objects without inviting an increase in production costs.
Other objects and novel features of the invention will become apparent from the description of the specification with reference to the accompanying drawings.
Typical embodiments of the invention are briefly summarized below.
A method of manufacturing a semiconductor device according to one embodiment of the invention comprises the steps of:
(a) providing a semiconductor chip having a plurality of bump electrodes on a main surface thereof;
(b) providing a wiring board which has a plurality of electrode pads on a main surface thereof in such a way that at least a part of pitches of the plurality of electrode pads is different from pitches of the plurality of bump electrodes formed on the main surface of the semiconductor chip; and
(c) disposing the semiconductor chip to flip chip mounting on the main surface of the wiring board so that the plurality of bump electrodes are electrically connected to the plurality of electrode pads, respectively.
In the above method, a distance of one end to the other of the arrays of the plurality of electrode pads provided in the step (b) and formed on the main surface of the wiring board is smaller than a distance of from one end to the other of the arrays of the plurality of bump electrodes provided in the step (a) and formed on the main surface of the semiconductor chip.
A method of manufacturing a semiconductor device according to another embodiment of the invention comprises the steps of:
(a) providing first and second semiconductor chips each having a plurality of bump electrodes on a main surface thereof;
(b) providing a wiring board having a plurality of electrode pads on a main surface thereof in such a way that at least a part of the plurality of electrode pads has pitches different from pitches of the plurality of bump electrodes formed on the main surface of each of the first and second semiconductor chips; and
(c) disposing the first and second semiconductor chips to flip chip mounting on the main surface of the wiring board so that the plurality of bump electrodes are electrically connected to the plurality of electrode pads, respectively.
REFERENCES:
patent: 5891758 (1999-04-01), Honda et al.
patent: 5972739 (1999-10-01), Funada et al.
patent: 6046495 (2000-04-01), Urushima
patent: 6177295 (2001-01-01), De Samber et al.
patent: 11-297759 (1999-10-01), None
Funaki Tsukio
Kado Yoshiyuki
Kikuchi Hiroshi
Yoshida Ikuo
Elms Richard
Hitachi , Ltd.
Luu Pho M.
Miles & Stockbridge P.C.
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