Method of manufacturing a semiconductor component and...

Electrolysis: processes – compositions used therein – and methods – Electrolytic coating – Coating selected area

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C205S170000

Reexamination Certificate

active

06361675

ABSTRACT:

FIELD OF THE INVENTION
This invention relates, in general, to methods of manufacturing semiconductor components, and more particularly, to plating metal layers and plating tools therefor.
BACKGROUND OF THE INVENTION
The manufacturing of semiconductor components typically includes the plating of metal layers over a semiconductor substrate. However, plating processes have many problems. For example, the plating of a front surface of a semiconductor substrate typically also results in the undesired plating of the edge and back surfaces of the semiconductor substrate, and this undesired plating must be removed. The removal of the undesired plating requires several extra processing steps and increases the cost and duration of the manufacturing process. The extra steps also increase the probability of substrate breakage. Furthermore, the plating techniques also suffer from poor process control. For example, the thickness of the plated metal layer typically varies substantially across the semiconductor substrate, and it is also difficult to determine precisely when the plated metal layer has its desired thickness and when the plating process should be terminated. One reason for the poor process control is the use of cathode contacts to puncture through a photoresist layer to contact a metal seed layer.
Accordingly, a need exists for a method of manufacturing a semiconductor component that uses a plating technique eliminating or at least substantially reducing the undesired plating of the edge and back surfaces of the semiconductor substrate. It is desired for the plating technique to also have adequate process control. Furthermore, to achieve the desired manufacturing method, a need also exists for a plating tool that prevents or at least reduces plating on the edge and back surfaces of a semiconductor substrate and that enables adequate process control.


REFERENCES:
patent: 5358621 (1994-10-01), Oyama
patent: 5407557 (1995-04-01), Iida et al.
patent: 5429733 (1995-07-01), Ishida
patent: 5447615 (1995-09-01), Ishida
patent: 6099712 (2000-08-01), Ritzdorf et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method of manufacturing a semiconductor component and... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of manufacturing a semiconductor component and..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of manufacturing a semiconductor component and... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2889812

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.