Method of manufacturing a recessed gate of a semiconductor devic

Details Method of manufacturing a recessed gate of a semiconductor devic Method of manufacturing a recessed gate of a semiconductor devic

1985-10-21

1987-07-14

Roy, Upendra

Metal working

Method of mechanical manufacture

Assembling or joining

29571, 29578, 29579, 148 15, 148175, 148187, H01L 2122, H01L 21265, H01L 21302

Patent

active

046793070

ABSTRACT:
This invention relates to a method of manufacturing recessed gate type SIT, comprising the steps of recess etching of a high resistivity epitaxial layer on a semiconductor substrate serving as a drain or source, adding an impurity on the bottom to form a gate, and providing a surface main electrode on the surface of the high resistance epitaxial layer. When a gate region is cut by etching, a recessed part is produced to form a concave portion wider than an etching mask. This etching mask is used without modification as a mask at the time of doping by ion implantation. This not only enables to omit some steps but forms a surface main electrode portion and a gate region in a self-aligning fashion to obtain a static induction transistor which has a well controlled characteristic.

REFERENCES:
patent: 4403396 (1983-09-01), Stein
patent: 4412378 (1983-11-01), Shinada
patent: 4419811 (1983-12-01), Rice
patent: 4517730 (1985-05-01), Meignant
patent: 4561168 (1985-12-01), Pitzer et al.

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