Electrolysis: processes – compositions used therein – and methods – Electrolytic coating – Coating selected area
Patent
1997-05-19
1999-01-26
Gorgos, Kathryn L.
Electrolysis: processes, compositions used therein, and methods
Electrolytic coating
Coating selected area
29840, C25D 502, H05K 324, H05K 334
Patent
active
058634061
DESCRIPTION:
BRIEF SUMMARY
This is a national stage application of PCT/EP95/02634, filed on Jul. 6, 1995.
The present invention relates to a method of manufacturing a printed circuit board and to a method of manufacturing an electronic card; particularly, it relates to a method of manufacturing a printed circuit board for surface mounting of components thereon.
A printed circuit board (PCB) is an electronic package including a circuitized substrate for carrying one or more components, such as chips, transistors, capacitors, resistors and so on, to be connected to the circuit conductors thereof; the assembled device composed by the printed circuit board with the components connected thereto is generally called an electronic card.
In the Surface Mounting Technology (SMT), the substrate surface of the PCB is provided with conductive projections, such as pads and lands (when surrounding a through-hole of the board), for connecting to electrical contacts of the components. Solder is deposited onto such conductive projections, for assembly of components onto the board, providing mechanical and electrical connection.
The SMT process commonly requires the board to be coated with electroless conductive material, typically copper. A further layer of conductive material is then electroplated onto the board and subsequently etched through an etching mask. After stripping the etching mask, an insulating material is applied onto the whole board and exposed with the exception of the selected conductive projections, in order to leave the same conductive projections free after developing. The solder may then be deposited onto the conductive projections, previously finished with different methods known in the art, such as ENTEK or HASL (Hot Air Solder Level). The ENTER method is described in "Surface investigation of copper in printed circuit board"--A. Manara, V. Sirtori--Surface and Interface analysis--1990--Vol. 15, Pag. 457-462, while the HASL method is described in "Soldering in electronics"--R. J. Klein Wassink--Ed. Electrochemical Publications.
A critical step in the SMT processes known in the art is the solder paste screening required as a first step in the assembly process of the finished printed circuit board. This step depends on many factors, including the solder paste rheology, that is its visco-elastic properties. The solder paste rheology is itself affected by a lot of parameters, as vehicle chemical composition, powder granulometry, vehicle powder mixing process. In addition, the screening operation is itself influenced by many factors, such as the machine setup, shape of stencil window, stencil cleaning frequency, operator skill.
A further emerging technology in the SMT field is the so called Flip Chip Attachment (FCA). It consists in bonding directly chips, provided with several ball contacts, onto small PCB conductive projections. This is a very complicated and difficult operation because of the very small dimensions of the conductive projections. Presently, the bonding of the chips onto the conductive projections is done with several different techniques, like the deposit of the solder by a dedicated and expensive machine that injects the melted solder on the conductive projections, or the screening of conductive adhesives or solder paste. The drawbacks of these methods are the cost of the solder injection machine and of the conductive adhesives and the high complexity and criticalness of the conductive adhesive and solder paste screening.
A method of electroplating solder onto selected areas of the conductors of a printed circuit board is described in U.S. Pat. No. 4,304,640. The method includes the steps of providing printed circuit conductors on the board, electroplating a conductive layer onto the whole surface, forming an insulating mask and electroplating the solder onto the selected areas of the conductors.
However, the described process is effective for selectively electroplating only a thin layer of solder onto the circuit conductors; the deposited layer can be used exclusively to protect the electroplated conductive laye
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Kazunori Oki, Newest Technology Permits Washless Soldering, JEE Journal of Electronic Engineering, vol. 28, No. 298, Tokyo, pp. 74-78, Oct. 1991.
IBM Technical Disclosure Bulletin, vol. 32, No. 3B, Armonk, N.Y., pp. 36-37, "Solder Bump-Making Process." Aug. 1989.
IBM Technical Dislcosure Bulletin, vol. 35, No. 2, Jul. 1992, Armonk, NY, p. 19, "Volume Control Of Plated Solder Ped Arrays".
Mazzoni Roberto
Monzani Adelio
Sirtori Vittorio
Gorgos Kathryn L.
International Business Machines Corp.
Leader William T.
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