Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Assembly of plural semiconductive substrates each possessing...
Reexamination Certificate
2000-01-31
2003-04-08
Smith, Matthew (Department: 2825)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Assembly of plural semiconductive substrates each possessing...
C438S110000, C257S723000
Reexamination Certificate
active
06544814
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device, and more particularly to processes for assembling a semiconductor device.
2. Background Art
A conventional method of manufacturing a semiconductor device will be described by reference to
FIGS. 5A
to
5
F. Conventionally, at the time of manufacture of a semiconductor device by assembly of a semiconductor chip, an insulating substrate
1
is prepared as shown in FIG.
5
A. Next, as shown in
FIG. 5B
, semiconductor chips
3
are mounted on the insulating substrate
1
through use of a resin
2
for mounting purpose. Then, as shown in
FIG. 5C
, by means of connection wires
4
, electrodes of the semiconductor chips
3
are electrically connected to conductive patterns provided on the insulating substrate
1
. Next, as shown in
FIG. 5D
, all the semiconductor chips
3
provided on one side of the insulating substrate
1
are sealed by a transfer mold resin
5
.
Further, as shown in
FIG. 5E
, electrode balls
6
for external connection purposes are formed on the other side of the insulating substrate
1
where no semiconductor chips
3
are mounted. As shown in
FIG. 5F
, in the final fabrication process, both the transfer mold resin
5
and the insulating substrate
1
are simultaneously diced into single semiconductor devices
7
by means of, for example, a dicing method or a laser cutting method.
According to the foregoing conventional method of manufacturing a semiconductor device, the entirety of a comparatively large insulating substrate
1
is collectively sealed by the transfer mold resin
5
. To this end, the speed or pressure at which the transfer mold resin is to be injected must be increased, which results in deformation of the connection wires
4
, electrical short circuits across the connection wires, or occurrence of fatal imperfections, such as open circuits, which would be caused by removal or breakage of the connection wires
4
.
Since the connection wires
4
are used for establishing electrical connection, a region where the wires
4
are fixed must be ensured, which renders further miniaturization of a semiconductor device difficult.
SUMMARY OF THE INVENTION
The present invention has been conceived to solve the foregoing problem in the conventional art, and the object of the present invention is to improve the productivity and reliability of a semiconductor device by means of a method in which semiconductor chips are bonded and sealed by means of flip-chip bonding and a single sealing operation.
According to one aspect of the present invention, in a method of manufacturing a semiconductor device, a plurality of semiconductor chips are mounted on an insulating substrate through use of bumps and with a dielectric resin. The plurality of semiconductor chips mounted on the insulating substrate are sealed through use of a transfer mold resin. Further, the plurality of semiconductor chips, which are sealed on the insulating substrate with a resin, are separated into individual semiconductor devices.
In another aspect, in the method, the plurality of semiconductor chips may be mounted on the insulating substrate through use of a plurality of pieces of separated dielectric resin.
In another aspect, in the method, the plurality of semiconductor chips may be mounted on the insulating substrate through use of a plate-like single piece of dielectric resin.
Still in another aspect, in the method, the plurality of semiconductor chips are mounted on the insulating substrate in the form of a semiconductor chip group including a predetermined number of non-separated semiconductor chips.
Further in another aspect, in the method, the plurality of semiconductor chips may be mounted on the insulating substrate while remaining connected in the form of a wafer.
Other and further objects, features and advantages of the invention will appear more fully from the following description.
REFERENCES:
patent: 4970575 (1990-11-01), Soga
patent: 6081038 (2000-06-01), Murayama
patent: 6168972 (2001-01-01), Wang et al.
patent: 6284554 (2001-09-01), Shinomiya
patent: 6335271 (2002-01-01), Fukuyama
patent: 9-213744 (1997-08-01), None
patent: 10-12673 (1998-01-01), None
patent: 10-135252 (1998-05-01), None
patent: 10-135254 (1998-05-01), None
patent: 10-308473 (1998-11-01), None
Kimura Michitaka
Yamada Satoshi
Yasunaga Masatoshi
Lee Calvin
McDermott & Will & Emery
Mitsubishi Denki & Kabushiki Kaisha
Smith Matthew
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