Method of manufacturing a nonvolatile semiconductor memory

Details Method of manufacturing a nonvolatile semiconductor memory Method of manufacturing a nonvolatile semiconductor memory

1992-09-25

1994-03-01

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437228, 437 48, 437 52, 257314, 257315, H01L 2176

Patent

active

052907236

ABSTRACT:
A method of manufacturing a nonvolatile semiconductor memory including forming a first insulating film, a first semiconductor film for forming floating gates, a second insulating film, and a second semiconductor film for forming control gates in that order on a semiconductor substrate, and forming etching masks, each having a configuration corresponding to that of the floating gate, at every other one of areas on the second semiconductor film where the floating gates are to be formed. Side wall spacers are formed on both side walls of each of the etching masks and a third semiconductor film, formed of the same material as that of the second semiconductor film is selectively grown on parts of the second semiconductor film which are not covered by any of the etching masks and the side wall spacers. Then the side wall spacers are removed and the second semiconductor film under the side wall spacers, the second insulating film and the first semiconductor film, together with the third semiconductor film in a direction substantially perpendicular to a surface of the semiconductor substrate by using the etching masks.

REFERENCES:
patent: 5002896 (1991-03-01), Naruke
patent: 5091327 (1992-02-01), Bergemont
patent: 5110753 (1992-05-01), Gill et al.
patent: 5114872 (1992-09-01), Roselle et al.
"Reviews and Prospects of Non-Volatile Semiconductor Memories", IEICE Transactions vol. E 74, No. 4 Apr. 1991, pp. 868-874.
"A 2.3 um.sup.2 Memory Cell Structure for 16 Mb NAND ERROMS", IEDM 90 pp. 103-106.

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