Method of manufacturing a multilayered wiring board

Metal working – Method of mechanical manufacture – Electrical device making

Patent

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Details

Other Related Categories

29846, 427 96, 427 97, H01K 310

Type

Patent

Status

active

Patent number

053534999

Description

ABSTRACT:
A method of forming a multilayered wiring board having a multilayered wiring structure includes the steps of forming a first mesh wiring layer having a plurality of holes therein, and forming a second wiring layer having a plurality of wirings undulating up and down so as to descend into the holes formed in the first wiring layer. In another method, the first wiring layer is formed with a plurality of protrusions and the wirings of the second wiring layer are formed between the protrusions. In the wiring boards formed according to the methods of the present invention, crosstalk between the wirings is suppressed.

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patent: 4372804 (1983-02-01), Hanabusa et al.
patent: 4830691 (1989-05-01), Kida et al.
patent: 5219607 (1993-06-01), Kawakami et al.
Patent Abstracts of Japan, vol. 11, No. 17 (E-471) Jan. 17, 1987.
Patent Abstracts of Japan, vol. 14, No. 216 (E-924) May 8, 1990.
Patent Abstracts of Japan, vol. 15, No. 390 (E-1118) Oct. 3, 1991.
John Shurboff, "Polyimide Dielectric on Hybrid Multilayer Circuits", 1983 IEEE, pp. 610-615.
Moriya et al., "High-Density Multilayer Interconnection with Photo-Sensitive Polyimide Dielectric and Electroplating Conductor", 1984 IEEE, pp. 82-87.
Kimijima et al., "High-Density Multichip Module by Chip-On-Wafer Technology", ISHM 1988 Proceedings, pp. 314-319.

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