Metal working – Method of mechanical manufacture – Electrical device making
Patent
1993-12-03
1997-01-14
Vo, Peter
Metal working
Method of mechanical manufacture
Electrical device making
29830, 29841, 156233, 156313, 174255, 174259, 174260, 264258, 428901, H05K 324, H05K 332, H05K 346, H05K 336
Patent
active
055927378
DESCRIPTION:
BRIEF SUMMARY
The invention relates to a method of manufacturing a multilayer printed wire board. Such a printed wire board comprises at least three conductive layers, of which usually at least two layers are copper-layers on the outer surfaces and at least one layer is an internal circuit. The method to which the invention pertains comprises bonding by lamination at least one hard base substrate which is provided with conductive traces on both sides and at least one intermediate substrate which comprises a hard core layer provided with an adhesive layer at least at the side facing the conductive traces of the base substrate.
Such a method has been disclosed in IBM Technical Disclosure Bulletin Vol 32 No. 5B, pages 355-356, and serves to substantially eliminate the dimensional instability that usually occurs in composite lamination processes. While this can be recognized as a substantial improvement in the manufacture of multilayer boards, the disclosure fails to address an even more important problem associated with multilayer boards, viz. that of providing a material displaying thermal coefficients of expansion (TCE) sufficiently low so as to match the TCE of electronic components (chips) used in conjunction with the multilayer board. A woven glass fabric (cloth) being used as the reinforcement material it is immediately apparent to the person of ordinary skill in the art that the TCEs obtained are relatively high. Further, the prior art substrates and the resulting multilayer boards require improved dimension stability.
Similar considerations apply to U.S. Pat. No. 3,756,891, which discloses a method of manufacturing multilayer PWBs involving the stacking of circuitized boards with adhesive coated sheets. The adhesive is chosen so as not to flow into the through-hole interconnection areas present in the boards.
A different approach towards multilayer PWBs is the sequential laminating technique disclosed in RCA review 29 (1968) pages 582-599, particularly pages 596-597. Although a base-substrate provided with circuitry on both sides is laminated with an adhesive coated dielectric layer, the adhesive coated layer is not an intermediate substrate in between base substrates in accordance with the invention, but serves as a substrate for a next printed circuit. The disclosure does not address the type of substrate used, let alone that it can provide a solution to the problem of providing multilayer boards having sufficiently low TCEs.
PWBs providing advantages with respect to TCE have been disclosed in U.S. Pat. No. 4,943,334. Described is a manufacturing process which comprises winding reinforcing filaments about a square flat mandrel to form a plurality of layers of filaments intersecting at an angle of 90.degree., providing the plurality of layers with a curable matrix material, and curing the matrix so as to form a base material for a PWB. In order to provide multilayer PWBs the disclosure teaches a method comprising providing an assembly of PWBs in a cavity, introducing a curable matrix material into the cavity, and curing the matrix so as to form a multilayer PWB. The desired reinforcement of the matrix is obtained by the presence of fibres around the PWBs, which during the process will become embedded in the cured matrix. The method fails to provide acceptable suitable results due to, inter alia, an internal lack of thickness-tolerance.
In C. J. Coombs, jr.'s Printed Circuits Handbook, published by McGraw-Hill, chapters 31 and 32, more particularly 33 and 34, it is described, int. al., how a multiple layer printed wire board, a so-called multilayer, is generally manufactured, the process being comprised of the following steps: fabric-epoxy prepreg; layers of glass fibre-epoxy prepreg.
There are a number of drawbacks to this process, such as high materials costs on account of glass fabric being employed and high thermal expansion on account of the low maximum fibre content in fibre-reinforced laminates. Another major drawback to this process is that there is no absolute thickness tolerance. The thickness of a multil
REFERENCES:
patent: 3473992 (1969-10-01), Martello et al.
patent: 3756891 (1973-09-01), Ryan
patent: 4299873 (1981-11-01), Ogihara et al.
patent: 4404059 (1983-09-01), Livshits et al.
patent: 4501787 (1985-02-01), Marchetti et al.
patent: 4606787 (1986-08-01), Pelligrino
patent: 4847136 (1989-07-01), Lo
patent: 4875282 (1989-10-01), Leibowitz
patent: 4943334 (1990-07-01), Medney et al.
patent: 5153987 (1992-10-01), Takahashi et al.
patent: 5282312 (1994-02-01), DiStefano et al.
R.C.A. Review, 29: 582-599 (Dec. 1968).
IBM Technical Disclosure Bulletin, vol. 32, No. 5B (Oct. 1989) p. 355.
C. F. Coombs, Jr., Printed Circuits Handbook, 3rd Ed. Chapters 31,32,33 and 34 and Glossary.
Middelman Erik
Zuuring Pieter H.
Akzo Nobel N.V.
Fennelly Richard P.
Morris Louis A.
Vo Peter
LandOfFree
Method of manufacturing a multilayer printed wire board does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of manufacturing a multilayer printed wire board, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of manufacturing a multilayer printed wire board will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1380474