Method of manufacturing a multi-layer board

Metal working – Method of mechanical manufacture – Electrical device making

Reexamination Certificate

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Details

C029S830000, C029S831000, C029S832000, C029S846000, C029S847000, C174S250000

Reexamination Certificate

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08051559

ABSTRACT:
A method of manufacturing a multi-layer board is disclosed. The method may include forming a detachable separation layer over a support; forming a first solder resist layer over the separation layer; stacking a metal foil over the first solder resist layer; forming a circuit pattern over the metal foil; forming an insulation part over the first solder resist layer such that the circuit pattern is covered; forming a second solder resist layer over the insulation part; and separating a circuit stack unit, which includes the first solder resist layer, the metal foil, the circuit pattern, the insulation part, and the second solder resist layer, from the support by disconnecting the separation layer and the support. This method uses a simple process to reduce manufacture costs and shorten manufacture times.

REFERENCES:
patent: 4713494 (1987-12-01), Oikawa et al.
patent: 5758413 (1998-06-01), Chong et al.
patent: 6323439 (2001-11-01), Kambe et al.
patent: 6670009 (2003-12-01), Voss
patent: 6-318783 (1994-11-01), None
patent: 2000-323613 (2000-11-01), None
patent: 2004-128029 (2004-04-01), None
patent: 2002-0085999 (2002-11-01), None
Korean Office Action issued Nov. 30, 2009 in corresponding Korean Patent Application 10-2008-0027073.
Japanese Office Action issued Nov. 9, 2010 in corresponding Japanese Patent Application 2008-232073.

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