Semiconductor device manufacturing: process – With measuring or testing – Packaging or treatment of packaged semiconductor
Reexamination Certificate
1998-01-26
2001-04-17
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
With measuring or testing
Packaging or treatment of packaged semiconductor
C324S532000, C324S701000, C349S187000, C438S017000
Reexamination Certificate
active
06218201
ABSTRACT:
The invention relates to an electronic device comprising at least one substrate, in which method an IC is placed on a surface of the substrate, which IC has a plurality of external connections which are brought into contact with interconnections on the surface during placement of the IC. The method is applied in particular to opto-electrical devices such as LCDs.
Currently used LCD drivers are typically devices with a high pin count (>100, 200 . . . ). During assembly, these devices have to be connected to interconnections on the LCD-display-glass or substrate or to a further substrate such as for example a printed-circuit board. There are various assembly methods, for example:
Chip-on-glass (COG), in which a device with gold-bumps is glued face to face onto the substrate (for example the LCD-glass), the gold bumps making contact to the interconnections,
Tape-automated bonding (TAB), in which a device with gold-bumps is first soldered onto a film, after which this film is connected to the substrate (LCD-glass), providing electrical contacts between the gold-bumps and the interconnections,
Standard bonding with gold-wiring into a plastic package which is then connected to the interconnections.
The method chosen has a direct impact on the costs of an LCD-module (module=substrates, including driver-IC). The COG application requires a minimal number of assembly steps because only a single contact between each driver output and an interconnection to the LCD input (or more generally between each external connection of the IC and an interconnection on the surface of the substrate) has to be made. However, such a COG assembly has some drawbacks:
Different causes may lead to a poor contact such as misalignment between gold-bumps and interconnections, contamination between gold-bumps and interconnections, and insufficient pressure during gluing.
Furthermore the height of the gold-bumps may vary to some extent within a chip. Consequently, there may be a gap between the bumps and the interconnections on the LCD-glass, which results in a poor contact.
To cope with this, the following assembly process may be carried out:
The driver-IC is first pressed onto the LCD-glass (or substrate) and then powered up.
The correct contacts between bumps and interconnections on the LCD-glass are then observed by sending some data to the LCD-display (for example, all pixels switched on and off).
If the display on the LCD-glass shows no defect, then the glue between driver-IC and glass is hardened.
This is a relatively slow process which requires some pattern-recognition hardware. Nevertheless, the quality of the contact between the bump and the interconnection cannot be measured (it is just a GO/NO-GO result). This assembly process thus has a rather low yield (number of approved LCD-modules, divided by the number of assembled LCD-modules).
Due to the demand for larger LCD-displays (requiring more interconnections), the pitch between bumps must be reduced from the current 100 &mgr;m. From the side of the LCD-glass processing, interconnections with a pitch of 30 &mgr;m are already possible. Such a small pitch would have a further impact on the yield of the assembly process, because the allowable misalignment between gold-bumps and interconnections is restricted further.
OBJECTS AND SUMMARY OF THE INVENTION
It is an object of the invention to provide a method of manufacturing an electronic device such as an LCD module which allows readout of the quality of the contacts and possibly a fully automated assembly (if desired, but not necessarily, combined with pattern recognition). This should not be in the form of GO/NO-GO results, but allow measurement of the margin between the quality of the actual contacts, and the quality of the contacts as defined in its specification.
According to the invention, the above object is met in that the quality of the connections is tested by powering up the IC (the chip) and running a selftest program after placement of the chip on the substrate.
The invention is based on the idea of using the functionality of the chip to test the quality of the connections during assembly or at a later stage. This could be done, for example, by
using the built-in capacitance of an LCD-device to reroute some output signals (for example, from the row pads) to some other pads (for example, the column pads).
comparing the delay of a rerouted signal with the external frequency, and calculating, as effect, a GO/NO-GO result,
or by, an extra device introducing a delay, for example by a capacitance and reroute signals from external connections of the IC to other external connections,
comparing the delay of a rerouted signal with a predetermined delay.
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Gradenwitz Paul G. M.
Huber Beat
Plangger Guido
Faller F. Brice
Hack Jonathan
Niebling John F.
U.S. Philips Corporation
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