Method of manufacturing a hybrid integrated circuit

Details Method of manufacturing a hybrid integrated circuit Method of manufacturing a hybrid integrated circuit

1997-03-12

1998-04-07

Tsai, Jey

Semiconductor device manufacturing: process

Bonding of plural semiconductor substrates

438238, H01L 21306

Patent

active

057364524

ABSTRACT:
A method of manufacturing a semiconductor device with a substrate (1) provided with a passive element (2), a pattern of conductors (3, 4), and a semiconductor element (5) which is formed in a small slice (6) of semiconductor material. The passive element (2), the pattern of conductors (3, 4), and the semiconductor element (5) are formed at a first side (8) of a wafer of semiconductor material (7), whereupon this wafer is glued with its first side (8) to the substrate (1), and the semiconductor material of the wafer (7) is removed from the second side (22) thereof, except at the area of the semiconductor element (5). A small slice (6) of semiconductor material thus remains in which the semiconductor element (5) has been formed. The wiring may be realized in a simple manner without the introduction of additional and expensive process steps, while the introduction of parasitic capacitances and self-inductances is counteracted.

REFERENCES:
patent: 4017341 (1977-04-01), Suzuki et al.
patent: 5356827 (1994-10-01), Ohoka
patent: 5446309 (1995-08-01), Adachi et al.
patent: 5476809 (1995-12-01), Kobayashi

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