Method of manufacturing a hetero-junction bi-polar transistor

Details Method of manufacturing a hetero-junction bi-polar transistor Method of manufacturing a hetero-junction bi-polar transistor

1993-05-11

1994-09-27

Thomas, Tom

Fishing, trapping, and vermin destroying

437126, 437133, 437100, 148DIG148, H01L 21265

Patent

active

053506995

ABSTRACT:
A hetero-junction bi-polar transistor provided with a collector composed of a .beta. - SiC substrate and a base area composed of a .beta. - SiC layer and an emitter area composed of an .alpha. - SiC layer, thereby forming a hetero-junction bi-polar transistor having superior heat resistance.

REFERENCES:
patent: 3242018 (1966-03-01), Grabmaier et al.
patent: 3634149 (1972-01-01), Knippenberg et al.
patent: 3869322 (1975-03-01), Cuomo et al.
patent: 4762806 (1988-08-01), Suzuki et al.
patent: 4855254 (1989-08-01), Eshita et al.
patent: 4912063 (1990-03-01), Davis et al.
patent: 4945394 (1990-07-01), Palmour et al.
patent: 5190890 (1993-03-01), Precht et al.
patent: 5200022 (1993-04-01), Kong et al.

Affiliated with

Also associated with

Rating

Method of manufacturing a hetero-junction bi-polar transistor does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of manufacturing a hetero-junction bi-polar transistor, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of manufacturing a hetero-junction bi-polar transistor will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1265274