Method of manufacturing a flash memory device

Semiconductor device manufacturing: process – Making passive device

Reexamination Certificate

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Details

C438S238000, C438S745000, C257SE21008, C257S017000, C257S229000, C257S645000, C257S659000

Reexamination Certificate

active

11301866

ABSTRACT:
A method of manufacturing a flash memory device wherein a stacked structure of an oxide and nitride or the reverse is applied to insulation spacers provided on sidewalls of gates for forming source/drain regions. After completing the source/drain regions, spacers are formed on sidewalls of the gates by using an oxide film as a contacting buffer, thus minimizing the interference between gates and reducing the stress to cells, overcoming the disturbance of threshold voltage.

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patent: 6362048 (2002-03-01), Huang
patent: 2005/0045939 (2005-03-01), Park et al.
patent: 2003-068889 (2003-03-01), None
patent: 10 2002-0032697 (2002-05-01), None
patent: 2002-0032697 (2002-05-01), None
patent: 2003-1954 (2003-01-01), None
patent: 10-2004-0019191 (2004-03-01), None
Official action issued in corresponding Korean application No. 2005-37105 dated Jun. 26, 2006.

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