Method of manufacturing a field effect transistor

Metal working – Method of mechanical manufacture – Assembling or joining

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H01L 2978

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active

046638270

ABSTRACT:
A polycrystalline silicon layer is formed on a surface of a gate oxide film on a silicon substrate. A mask is formed on a prospective gate region of the polycrystalline silicon layer. Nitrogen is ion-implanted using the mask into a portion of the polycrystalline silicon layer excluding the prospective gate region. In addition, an impurity for forming source and drain regions is ion-implanted into portions of the substrate. The ion-implanted nitrogen is then annealed to convert the portion of the substrate in which nitrogen has been ion-implanted into an electrically insulating layer. The portion in which no nitrogen has been ion-implanted functions as a gate electrode. An upper portion of the polycrystalline silicon layer is etched using the mask before the nitrogen is annealed. Thus, the upper surfaces of the insulating layer and the gate electrode can be level with each other after annealing.

REFERENCES:
patent: 4406051 (1983-09-01), Iizuka
patent: 4437225 (1984-03-01), Mizutani
patent: 4514233 (1985-05-01), Kawabuchi
patent: 4517729 (1985-05-01), Batra
patent: 4564583 (1986-01-01), Maeguchi
Zimmer et al., "CMOS on Buried Nitride-A VLSI SOI Technology," IEEE Transactions on Electron Devices, vol. ED-30, No. 11, Nov. 1983.

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