Fishing – trapping – and vermin destroying
Patent
1987-12-21
1990-02-27
Heaern, Brian E.
Fishing, trapping, and vermin destroying
437 29, 437 40, 437 27, 437203, 437228, 437235, 437200, H01L 2122, H01L 21467
Patent
active
049046136
ABSTRACT:
A method of manufacturing a semiconductor device in which a conductive layer (6) provided on a surface (4) of a semiconductor body (1) is formed with at least one opening (10). The semiconductor device may be an insulated gate field effect transistor (IGFET) in which case the opening (10) defines a hollow gate structure for the IGFET. Insulating material (16') is grown on the surface (4) to cover the conductive layer. The opening or openings (10) are sufficiently small and the growth of insulating material is continued for a sufficiently long period that insulating material growing on edges (8"a) of the conductive layer bounding the openings (10) meets to close the openings so that subsequent etching of the insulating material anisotropically towards the surface (4) to expose a surface of the conductive layer and/or to form a window (18) within insulating material covering an area of the semiconductor body surface larger than the openings and not covered by the conductive layer, leaves insulating material (19,17) on edges of the conductive layer so that the openings remain closed. Where the semiconductor device is an IGFET impurities to form the source and channel regions may be introduced via the window.
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Coe David J.
Tree Richard J.
Whight Kenneth
Heaern Brian E.
Miller Paul R.
Thomas T.
U.S. Philips Corporation
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