Method of manufacturing a dielectric isolation substrate

Details Method of manufacturing a dielectric isolation substrate Method of manufacturing a dielectric isolation substrate

1994-09-22

1995-05-30

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 62, 437974, 148DIG12, 148DIG135, H01L 2176

Patent

active

054200644

ABSTRACT:
According to this invention, there is provided a method of manufacturing a semiconductor device, including the steps of anisotropically etching a surface of an n-type monocrystalline silicon substrate having the (100) plane to form a V-shaped isolation groove having a depth d.sub.1, performing ion implantation and performing annealing and diffusion to a surface of the V-shaped isolation groove to form an n.sup.+ -type buried layer, depositing a silicon dioxide film having a thickness d.sub.2 on a surface of the n.sup.+ -type buried layer, forming a polycrystalline silicon film on a surface of the silicon dioxide film, abrading and polishing the polycrystalline silicon film to have a thickness d.sub.3, adhering a monocrystalline silicon support substrate having a thickness d.sub.4 to a polished surface of the polycrystalline silicon film at room temperature in the atmospheric air, abrading and polishing a lower surface of the n-type monocrystalline silicon substrate having the V-shaped isolation groove to expose the silicon dioxide film at a bottom portion of the V-shaped isolation groove on the lower surface and to form an island-like monocrystalline silicon film, wherein the thicknesses d.sub.1, d.sub.2, d.sub.3, and d.sub.4 are set to be 50 to 60 .mu.m, 1 to 3 .mu.m, 0 to 30 .mu.m, and 350 to 450 .mu.m, respectively.

REFERENCES:
patent: 4971925 (1990-11-01), Alexander et al.
patent: 5081061 (1992-01-01), Rouse et al.
patent: 5183783 (1993-02-01), Ohta et al.
T. Sugawara et al., "New Dielectric Isolation for High Voltage . . . Direct Bonding (SPSDB) Technique", Proceedings of 1992 International Symposium on Power Semiconductor Devices & ICs, Tokyo, pp. 316-321.

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