Method of manufacturing a device comprising MIS transistors havi

Details Method of manufacturing a device comprising MIS transistors havi Method of manufacturing a device comprising MIS transistors havi

1990-09-25

1991-05-14

Chaudhuri, O.

Fishing, trapping, and vermin destroying

437 41, 437191, 437233, 156643, 357 233, H01L 21265

Patent

active

050155989

ABSTRACT:
A method is set forth comprising the deposition of a first and a second polycrystalline conducting layer, which are separated by an insulating layer, with the object of creating gate islands which extend in the direction of highly doped parts (22b, 23b) of source and drain zones. According to the invention, the gate islands (15) the first delimited in the first polycrystalline layer (12), after which the edges of these islands are protected with provisional spacers (20a) of an oxidation-preventing material, so that after ion implantation of the weakly doped portions (22, 23) of the source and drain, non-protected parts of the device can be re-oxidized. After this, the provisional spacers (20a) are removed and the second polycrystalline layer (30) is deposited, thus achieving electrical contact with the previously protected edges of the islands (15) of the first polycrystalline layer (12). Widened gate islands are finally formed by the insulating spacer technique (32).

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Huang et al., "Eliminating Spacer Induced Degradations in LDD Transistors", 3rd Int'l. Symp. on VLSI Technology Systems and Applications, May 1987.

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