Metal working – Electric condenser making – Solid dielectric type
Reexamination Certificate
2000-04-03
2003-04-15
Tugbang, A. Dexter (Department: 3729)
Metal working
Electric condenser making
Solid dielectric type
C029S025410, C029S841000, C029S846000, C029S852000, C427S079000, C427S097100, C427S123000, C427S230000
Reexamination Certificate
active
06546607
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates generally to electrical capacitors and particularly to a crater-style capacitor for high-voltage radio-frequency applications.
Many applications require the sampling and control of high-voltage waveforms, particularly waveforms at radio frequencies. A sampling capacitor may be used to sample the waveform as feedback to control the amplitude of the waveform. To provide accurate sampling and amplitude control, the sampling capacitor must have a stable capacitance value. Further, it is often desirable to provide a guard capacitor positioned concentrically outward of the sampling capacitor. The guard capacitor protects the sampling capacitor from the effects of fringing fields and allows for accurate amplitude control based on the capacitance of the sampling capacitor only.
Desirable attributes of a sampling capacitor include negligible self-heating between the capacitor electrode and dielectric and elimination of corona discharge at the electrode edges. Self-heating of the capacitor can result in damage to the capacitor dielectric, and as the capacitor temperature rises it becomes more difficult to compensate for changes in capacitance due to the heating of the dielectric. Corona discharge at the edges of the electrodes can destroy the capacitor, damage the dielectric, or start a fire.
The crater-style capacitor of the present invention eliminates corona discharge at the electrode edges and has negligible self-heating. A system incorporating the capacitor can easily be compensated for stability. The capacitor includes two concentric capacitors patterned onto a dielectric such as quartz or ceramic. The outer guard capacitor protects an inner sampling capacitor from fringing fields. Amplitude feedback to a control system incorporating the capacitor is provided by the sampling capacitor only. In some applications, the combined capacitance of the guard capacitance and the sampling capacitance can be used in a resonant RF tank circuit.
Previous designs for sampling capacitors include ceramic-gap capacitors, open-gap capacitors, capacitors having a planar upper electrode, capacitors with an encapsulated upper planar electrode, and capacitors with a half-dome input connector to cover the upper planar electrode in combination with encapsulation of the upper planar electrode.
The disadvantage of ceramic-gap capacitors is that having ceramic in the gap yields a large spread of temperature coefficients and capacitance values. Ceramic is a variable blend with properties that vary from batch to batch of ceramic material.
Open gap capacitors are very large and suffer from voltage range limitations caused by corona discharge at planar electrode edges. Mechanical spacers used in the open-gap capacitor have varying temperature coefficients that alter the capacitance values. The dielectric constant of an open-gap capacitor is affected by humidity unless the capacitor is placed in a vacuum or other controlled environment.
In
FIG. 1
, there is provided for purposes of illustration, a prior art sampling capacitor generally designated as
100
. The sampling capacitor
100
has a dielectric
103
with an upper planar electrode
115
and a lower planar electrode
119
positioned on opposing surfaces of the dielectric
103
. Additionally, guard electrode
121
, completely encircles the lower planar electrode
119
. A sampling capacitor is defined by the upper planar electrode
115
and the lower planar electrode
119
and a guard capacitor is defined by upper planar electrode
115
and the guard electrode
121
. An electrode gap
135
electrically isolates the guard electrode
121
from the lower planar electrode
119
. One disadvantage of sampling capacitor
100
is that corona discharge occurs at an upper edge acuity
116
of the upper planar electrode
115
at operating voltages above about 2.5 kilovolts. In one experiment, encapsulating the upper planar electrode
115
with an encapsulant
125
extends the operating voltage to about 8.0 kilovolts; however, self-heating occurs at about 8.0 kilovolts. Further, as illustrated in
FIG. 3
, at operating voltages near about 12.0 kilovolts, an intense voltage gradient
118
at the upper edge acuity
116
create a corona discharge (hot spot) that ignited the encapsulant
125
.
FIG. 2
illustrates another prior art sampling capacitor generally designated as
200
. The sampling capacitor
200
employs a half-dome button
224
to overcome the intense voltage gradient at an upper edge acuity
216
of an upper planar electrode
215
. The half-dome button
224
eliminates the self-heating and corona discharge problems of the sampling capacitor
100
; however, penetration of encapsulant
225
between the half-dome button
224
, as illustrated by arrow
227
, results in a button-to-ground capacitance through both the encapsulant
225
and dielectric
203
. Because the button-to-lower electrode capacitances do not manifest themselves totally through just the dielectric
203
, the composition and temperature coefficient of the sampling capacitor varies. Therefore, the sampling capacitor
200
yields a high-voltage capacitor, but with the value of the sampling capacitor compromised by the button-to-ground capacitance.
From the foregoing it will be apparent that there is a need for a sampling capacitor that can withstand high-voltages, produces negligible self-heating, eliminates corona discharge, reduces the encapsulant's contribution to the sampling capacitor, and allows for a system incorporating the sampling capacitor to compensate for system stability.
SUMMARY OF THE INVENTION
The present invention provides a crater-style capacitor for high-voltage radio-frequency applications or other applications that require a stable sampling capacitor. The apparatus includes a dielectric having a crater in a first surface of the dielectric. An electrically conductive input electrode is deposited in the crater. An output electrode is positioned on a second surface of the dielectric creating a sampling capacitor between the input and the output electrodes. A guard electrode is positioned concentrically outward of the output electrode and defines a guard capacitor between the input and the guard electrodes.
An apparatus embodying the invention provides a stable sampling capacitor, eliminates corona discharge, has negligible self-heating, and allows a system incorporating the present invention to be compensated for system stability while withstanding high-voltages in excess of 17.0 kilovolts.
In a preferred embodiment, a slab of dielectric material has a crater formed in a first surface. The crater having a smooth surface defined by a bottom surface, a liftoff curve, and a sidewall surface. An output electrode and a guard electrode are deposited on an opposing surface, with the guard electrode encircling the output electrode. An input electrode is deposited in the crater and covers the bottom, the liftoff curve, and a portion of the sidewall surface. An edge of the input electrode is positioned on the sidewall surface at a point intermediate between the first surface and the sidewall surface. Input and output terminals are connected to the input and output electrodes respectively. The crater is filled with a non-conductive encapsulant. The resulting crater-style capacitor includes a sampling capacitor defined by the input electrode and the output electrode and a guard capacitor defined by the input electrode and the guard electrode. In another embodiment, the edge of the input electrode positioned at a point on the sidewall surface adjacent to the first surface. Additionally, the crater-style capacitor may be mounted in a base for thermal control and/or monitoring.
A method of making a crater-style capacitor according to the present invention may include the following steps: grinding a crater into a first surface of a dielectric, depositing an input electrode in the crater, applying an output electrode on a second surface of the dielectric, and applying a guard electrode on the second surface. Optional steps may inclu
Crawford Robert K.
Goldberg J. Gerson
Agilent Technologie,s Inc.
Mayer Marc R.
Tugbang A. Dexter
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