Fishing – trapping – and vermin destroying
Patent
1991-03-19
1993-03-16
Maples, John S.
Fishing, trapping, and vermin destroying
437193, 437200, 437 46, H01L 2946
Patent
active
051944049
ABSTRACT:
A method of manufacturing a low resistance contact structure for a semiconductor device wherein a polycide layer is formed on a semiconductor substrate, and the surface of the substrate is covered with an interlayer isolation layer which is provided with a contact hole over the polycide layer. After filling the contact hole with polycrystalline silicon or forming a polycrystalline silicon contact or a polycide structure contact which connects to the polycide layer at the contact hole, the structure is subjected to a short term and high temperature annealing treatment at a temperature over 900.degree. C.
REFERENCES:
patent: 4801559 (1989-01-01), Imaoka
patent: 4816425 (1989-03-01), McPherson
patent: 4897368 (1990-01-01), Kobushi et al.
patent: 4906591 (1990-03-01), Okumura
patent: 5094981 (1992-03-01), Chung et al.
Murarka et al. "Refractory Silicides of Titanium and Tantalum for Low-Resistivity Gates and Innerconnects" IEEE Journal of Solid-State Circuits vol. SC-15, No. 4, Aug. 1980 pp. 474-481.
Yoshitaka Narita et al, "A New CMOS SCRAM Cell with Fully Planarizing Technology", Symposium on VLSI Technology, 1987, pp. 103-104.
Maples John S.
Oki Electric Industry Co. Ltd.
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