Method of manufacturing a contact of a highly integrated semicon

Details Method of manufacturing a contact of a highly integrated semicon Method of manufacturing a contact of a highly integrated semicon

1992-12-11

1994-03-22

Thomas, Tom

Fishing, trapping, and vermin destroying

437 47, 437 48, 437 60, 437193, 437235, H01L 2170

Patent

active

052964000

ABSTRACT:
When contacting a bit line and a charge storage electrode to a source/drain of the MOS transistor during a manufacturing process of a highly integrated semiconductor device, a contact pad is formed by filling up polysilicon into a contact hole that had been made using a self-align method in order not to damage the word line or the bit line as a result of a small processing margin during a contact hole forming process. Also, the occurrence of a topological difference during a semiconductor manufacturing process is minimized by forming an oxide layer such as SOG, BPSG, TEOS, and PECVD oxide over the top of the field oxide for a flattening effect.

REFERENCES:
patent: 4792534 (1988-12-01), Tsuji et al.
patent: 4957881 (1990-09-01), Crotti
patent: 4997790 (1991-05-01), Woo et al.
patent: 5200358 (1993-04-01), Bollinger et al.

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