Semiconductor device manufacturing: process – Making device or circuit emissive of nonelectrical signal – Substrate dicing
Reexamination Certificate
2001-12-06
2004-03-16
Chambliss, Alonzo (Department: 2827)
Semiconductor device manufacturing: process
Making device or circuit emissive of nonelectrical signal
Substrate dicing
C438S113000, C438S124000, C438S127000, C438S458000, C438S459000, C438S462000, C438S666000, C029S527500, C029S825000, C029S855000, C029S856000
Reexamination Certificate
active
06706547
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a method for manufacturing circuit devices, and particularly relates to a method for manufacturing low-profile circuit devices that does not require any supporting substrate.
Circuit devices set in electronic equipment are heretofore desired to be made smaller in size, thinner in thickness and lighter in weight because they are used in portable telephones, portable computers, etc.
For example, a semiconductor device will be described as such a circuit device by way of example. As a typical semiconductor device, there is conventionally a packaged semiconductor device sealed by usual transfer-molding. This semiconductor device is mounted on a printed circuit board PS as shown in FIG.
11
.
In the packaged semiconductor device
1
, a semiconductor chip
2
is covered with a resin layer
3
, and lead terminals
4
for external connection are led out from side portions of the resin layer
3
.
Because the lead terminals
4
are led from the resin layer
3
to the outside, the whole size of the packaged semiconductor device
1
is, however, too large to satisfy the request to make it smaller in size, thinner in thickness and lighter in weight.
Therefore, various structures have been developed by various manufacturers in order to make packaged semiconductor devices smaller in size, thinner in thickness and lighter in weight. Recently, the packaged semiconductor devices are developed into Chip Size Packages (CSPs) such as wafer-scale CSPs as large as the chip size, or CSPs a little larger than the chip size.
FIG. 12
shows a CSP
6
which uses a glass epoxy substrate
5
as a supporting substrate and which is a little larger than the chip size. Here, description will be made on the assumption that a transistor chip T has been mounted on the glass epoxy substrate
5
.
A first electrode
7
, a second electrode
8
and a die pad
9
are formed on the front surface of the glass epoxy substrate
5
while a first back-surface electrode
10
and a second back-surface electrode
11
are formed on the back surface of the glass epoxy substrate
5
. The first and second electrodes
7
and
8
are electrically connected to the first and second back-surface electrodes
10
and
11
via through holes TH respectively. In addition, the bare transistor chip T is firmly fixed to the die pad
9
. An emitter electrode of the transistor is connected to the first electrode
7
through a metal fine wire
12
, and a base electrode of the transistor is connected to the second electrode
8
through a metal fine wire
12
. Further, a resin layer
13
is provided on the glass epoxy substrate
5
so as to cover the transistor chip T.
The CSP
6
uses the glass epoxy substrate
5
to thereby achieve a simple structure extending from the chip T to the back-surface electrodes
10
and
11
for external connection, compared with a wafer-scale CSP. Thus, there is a merit that the CSP
6
can be manufactured inexpensively.
In addition, the CSP
6
is mounted on a printed circuit board PS as shown in FIG.
11
. Electrodes and wiring for constituting an electric circuit are provided on the printed circuit board PS, and the CSP
6
, the packaged semiconductor device
1
, a chip resistor CR or a chip capacitor CC, etc. are electrically connected and firmly fixed to the printed circuit broad PS.
Then, the circuit constituted on the printed circuit board will be attached to various sets.
Next, a method for manufacturing the CSP will be described with reference to
FIGS. 13A
to
13
D and FIG.
14
.
First, the glass epoxy substrate
5
is prepared as a base material (as a supporting substrate), and Cu foils
20
and
21
are bonded to both sides of the glass epoxy substrate
5
through an insulating bonding material respectively (the above step is illustrated in FIG.
13
A).
Subsequently, the Cu foils
20
and
21
corresponding to the first electrode
7
, the second electrode
8
, the die pad
9
, the first back-surface electrode
10
and the second back-surface electrode
11
are covered with an etching-proof resist
22
and patterned. Incidentally, the front surface and the back surface of the glass epoxy substrate
5
may be patterned separately (the above step is illustrated in FIG.
13
B).
Subsequently, holes for the through holes TH are formed in the glass epoxy substrate by use of a drill or a laser, and then plated. Thus, the through holes TH are formed. Via the through holes TH, the first and second electrodes
7
and
8
are electrically connected to the first and second back-surface electrodes
10
and
11
respectively (the above step is illustrated in FIG.
13
C).
Further, though not shown, the first and second electrodes
7
and
8
which will be bonding posts are plated with Ni, while the die pad
9
which will be a die bonding post is plated with Au. Then, the transistor chip T is die-bonded.
Finally, the emitter electrode and the base electrode of the transistor chip T are connected to the first and second electrodes
7
and
8
through the metal fine wires
12
respectively, and covered with the resin layer
13
(the above step is illustrated in FIG.
13
D).
In the above-mentioned manufacturing method, a CSP type electric element using the supporting substrate
5
is produced. Alternatively, in this manufacturing method, the glass epoxy substrate
5
may be replaced by a flexible plate as a supporting substrate to produce the CSP type electric element similarly.
On the other hand, a manufacturing method useing a ceramic substrate is shown in the flow chart of
FIG. 14. A
ceramic substrate which is a supporting substrate is prepared, and through holes are formed therein. After that, front-surface and back-surface electrodes are printed with conductive paste, and sintered. The following steps up to covering with a resin layer are the same as those in the manufacturing method in
FIGS. 13A-13D
. However, differently from the flexible sheet or the glass epoxy substrate, the ceramic substrate is very fragile to be chipped easily. Therefore, there is a problem that the ceramic substrate cannot be molded by use of a mold. Thus, the CSP type electric element is produced by potting sealing resin on the ceramic substrate, hardening the sealing resin, polishing the sealing resin to be even, and finally separating the ceramic substrate with the sealing resin individually by use of a dicing apparatus. Also in the case where the glass epoxy substrate is used, there is a fear that the substrate is crushed when it is strongly held by a mold for transfer-molding.
In
FIG. 12
, the transistor chip T, the connection member
7
to
12
, and the resin layer
13
are essential constituent elements for electric connection with the outside and protection of the transistor. However, it is difficult to provide a circuit element made smaller in size, thinner in thickness and lighter in weight, by using all of such essential elements.
In addition, the glass epoxy substrate
5
which is a supporting substrate is unnecessary by nature as described above. However, in the manufacturing method, the glass epoxy substrate
5
cannot be omitted because the glass epoxy substrate
5
is used as a supporting substrate for bonding electrodes to each other.
Because the glass epoxy substrate
5
is used, the cost increases. Further, because the glass epoxy substrate
5
is thick, the circuit element becomes thick. Accordingly, there is a limit in making the circuit element smaller in size, thinner in thickness and lighter in weight.
Further, in the glass epoxy substrate and the ceramic substrate, the step of forming the through hole for connecting the electrodes of the both sides of the substrate is indispensable, thus causing the manufacturing process prolonged.
SUMMARY OF THE INVENTION
The present invention has been made in view of above mentioned many subjects, and provides a circuit device manufacturing method that comprises the steps of forming conductive patterns by preparing a conductive foil and then forming isolation trenches, that are shallower than a thickness of the conductiv
Igarashi Yusuke
Kobayashi Yoshiyuki
Maehara Eiju
Okada Yukio
Sakamoto Junji
Chambliss Alonzo
Sanyo Electric Co,. Ltd.
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