Method of manufacture thin film transistors

Details Method of manufacture thin film transistors Method of manufacture thin film transistors

1989-08-08

1991-09-10

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 21, 437984, 437 29, 148DIG18, 148DIG105, H01L 21336

Patent

active

050473603

ABSTRACT:
A TFT is fabricated by providing on a substrate (10), and over a gate (12), a sequentially formed multi-layer structure consisting of a gate insulator layer (14), an intrinsic semiconductor, e.g. a-Si or polysilicon, layer (16) for the channel, a doped semiconductor, e.g. n type a-Si or polysilicon, layer (18) for source and drain contact regions and a passivating layer (20). The layer (18) extends completely over and covers the channel region of the layer (16). Thereafter, the portion (30) of layer (18) overlying the channel region is converted by a compensating doping implant to a highly resistive form separating the source and drain contact regions, and windows (22, 24) are defined in the passivating layer (20) into which source and drain contacts (26, 28) are deposited. In this way critical interfaces are protected from contamination. The TFT is suitable for use as a switching element in active matrix display devices, e.g. LC-TVs.

REFERENCES:
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patent: 4459739 (1984-07-01), Shepherd et al.
patent: 4624737 (1986-11-01), Shimbo
patent: 4700458 (1987-10-01), Suzuki et al.
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patent: 4738749 (1988-04-01), Maurice et al.
patent: 4788560 (1988-10-01), Takeda et al.
patent: 4797108 (1989-01-01), Crowther
patent: 4882295 (1989-11-01), Czubatyj et al.
European Search Report, EP 89 20 2406.

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