Method of manufacture of silicon-germanium heterobipolar transis

Details Method of manufacture of silicon-germanium heterobipolar transis Method of manufacture of silicon-germanium heterobipolar transis

1994-01-06

1995-06-13

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437131, 437110, 437126, 437200, H01L 21331

Patent

active

054242274

ABSTRACT:
Manufacture of a semiconductor array of integrated silicon-germanium heterobipolar transistors having a silicon collector layer, a silicon-germanium base layer, a silicon emitter layer and a silicon emitter contact layer includes depositing in a single uninterrupted process and simultaneously doping the collector layer, the base layer, the emitter layer and the emitter contact layer. A base connection region is formed at the side of the base layer such that the intersection surfaces of the base/emitter/PN boundary layer and of the base/collector PN boundary layer with the surface of the semiconductor array are outside the silicon-germanium base layer. A silicon dioxide layer is formed by thermal oxidation over the entire exposed surface of the semiconductor array.

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N. N.: Slective Epitacial Base with Si/Ge Banga for Double-Poly Self aligned Bipolar Transistors. In: IBM Technical Disclosure Bulletin, vol. 34, No. 8, Jan. 1992 pp. 86-88.
K. Mitani et al.: Planar AlGaAs/GaAs Heterojunction Bipolar Transistors Fabricated Using Selective W-CVD. In: IEEE Electron Device Letters, vol. 13, No. 4, Apr. 1992 pp. 209 and 210.

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