Method of making vertical channel mask ROM

Details Method of making vertical channel mask ROM Method of making vertical channel mask ROM

1994-11-01

1996-04-23

Thomas, Tom

Fishing, trapping, and vermin destroying

437 45, 437 48, 437 89, H01L 218246

Patent

active

055102875

ABSTRACT:
A device and a method of manufacture of a semiconductor device on a semiconductor substrate is provided. An N+ source layer is formed on the surface of the semiconductor substrate. A dielectric layer is formed on the surface of the source layer. The dielectric layer is patterned and etched forming a dielectric layer pattern with openings therein, a silicon epitaxial layer in the openings in the dielectric layer pattern. An N+ drain layer is formed on the surface of the silicon epitaxial layer. A second dielectric layer is formed on the surface of the device including the N+ drain layer. A conductor layer is formed and patterned containing silicon over the second dielectric layer. An N+ implant mask with an N+ opening over a region of the epitaxial layer is formed (source) and ion implanting through that N+ opening into the N+ implant mask in that region. A code implant mask over the conductor layer is formed and ions are implanted through the code implant mask into the device.

REFERENCES:
patent: 4554570 (1985-11-01), Jastrzebski
patent: 4984030 (1991-01-01), Sunami
patent: 5081052 (1992-01-01), Kobayashi et al.
patent: 5208172 (1993-05-01), Fitch et al.
patent: 5244824 (1993-09-01), Sivan

Affiliated with

Also associated with

Rating

Method of making vertical channel mask ROM does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of making vertical channel mask ROM, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of making vertical channel mask ROM will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2308152