Method of making unpinned oxide-compound semiconductor structure

Details Method of making unpinned oxide-compound semiconductor structure Method of making unpinned oxide-compound semiconductor structure

1988-06-15

1991-01-22

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437107, 437132, 437184, 437185, 437 40, 437 41, 437 42, 437913, 437983, 437941, 437978, 437980, 148 333, 148 334, 148DIG149, 357 2315, 357 54, H01L 2978

Patent

active

049870955

ABSTRACT:
Unpinned epitaxial metal-oxide-compound semiconductor structures are disclosed and a method of fabricating such structures is described. Epitaxial layers of compound semiconductor are grown by MBE which result in the formation of a smooth surface having a stabilized reconstruction. An elemental semiconductor layer is deposited epitaxially in-situ with the compound semiconductor layer which unpins the surface Fermi level. A layer of insulator material is then deposited on the elemental semiconductor layer by PECVD. In one embodiment, the compound semiconductor is GaAs and the elemental semiconductor is Si. The insulator material is a layer of high quality SiO.sub.2. A metal gate is deposited on the SiO.sub.2 layer to form an MOS device. The epitaxial GaAs layer has a density of states which permits the interface Fermi level to be moved through the entire forbidden energy gap. In another embodiment, the SiO.sub.2 deposition completely consumes the interface Si layer so that the resulting MOS device comprises SiO.sub.2 directly overlying the GaAs layer.

REFERENCES:
patent: 4144634 (1979-03-01), Chang et al.
patent: 4297176 (1981-08-01), Hannah et al.
patent: 4556895 (1985-12-01), Ohata
patent: 4615766 (1986-10-01), Jackson et al.
patent: 4634474 (1987-01-01), Camlibel et al.
patent: 4645564 (1987-02-01), Morie et al.
patent: 4757030 (1988-07-01), Galvin et al.
patent: 4843450 (1989-06-01), Kirchner et al.
patent: 4859253 (1989-08-01), Buchanan et al.
patent: 4871692 (1989-08-01), Lee et al.
patent: 4935384 (1990-06-01), Wanlass
List, R. S. et al., The Si/GaAs(110) Heterojunction, J. Vac. Sci. & Technol. A 4 May/Jun. (1986), No. 3, Part II, Second Series, New York, N.Y. U.S.A.
Woodall, J. M. and Freeouf, J. L., GaAs Metallization: Some Problems and Trends, J. Vac. Sci. Technol., 19(3), Sep./Oct. 1981.
Fountain et al., GaAs MIS Structures with SiO.sub.2 Using a Thin Silicon Interlayer, Electronics Letters, vol. 24, No. 18, Sep. 1, 1988.
R. Z. Bachrach et al., Surface Structure and Interface Formation of Si on GaAs (100), J. Vac. Sci. Technol. B 5 94), Jul./Aug. 1987.
J. R. Waldrop et al., Metal Contacts to GaAs with 1 eV Schottky Barrier Height, Appl. Phys. Lett. 52(21), May 23, 1988.
R. W. Grant et al., Variation on n-GaAs (100) Interface Fermi Level by Ge and Si Overlayers, J. Va. Sci. Technol. B 5(4), Jul./Aug. 1987.
Mark E. Greiner et al., Diffusion of Silicon in Gallium Arsenide Using Rapid Thermal Processing: Expreiment and Model, Appl. Phys. Lett. 44(8), Apr. 15, 1984.
S. D. Offsey et al., Unpinned (100) GaAs Surfaces in Air Using Photochemistry, Appl. Phys. Lett. 48(7), Feb. 17, 1986.
C. J. Sandroff et al., Dramatic Enhancement in the Gain of a GaAs/AlGaAs Heterostructure Bipolar Transistor by Surface Chemical Passivation, Appl. Phys. Lett. 51(1), Jul. 6, 1987.
J. Batey et al., Low-Temperature Deposition of High-Quality Silicon Dioxide by Plasma-Enhanced Chemical Vapor Deposition, J. Appl. Phys. 60(9), Nov. 1, 1986.
J. Batey et al., Electrical Characteristics of Very Thin SiO.sub.2 Deposited at Low Substrate Temperatures, IEEE Electron Device Letters, vol. EDL-8, No. 4, Apr. 1987.
P. C. Zalm et al., Silicon Molecular Beam Epitaxy Gallium Arsenide, Appl. Phys. Lett. 46(6), Mar. 15, 1985.
G. G. Fountain et al., Electrical and Microstructural Characterization of an Ultrathin Silicon Interlayer used in a Silicon Dioxide/Germanium Based Mis Structure, Proc. Fall Meeting Materials Research Society, Boston, 1987; Elec. Lett. V24 N16, pp. 1010-1011 (1988).
Richard, P. D., J. Vac. Sci. Tech, A3(3), May/Jun. 1985, p. 867.
Li, K., J. Vac. Sci. Tech., A4(3), May/Jun. 1986, p. 958.
Tubib-Azar, M., Appl. Phys. Lett., 52(3), 18, Jan. 1988, p. 206.

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