Method of making thin film transistors

Fishing – trapping – and vermin destroying

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437187, 437101, 437909, 437982, 430317, 430330, H01L 21265

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active

053710258

ABSTRACT:
A method of making thin film transistors, capable of reducing the extent of channel overlap between a gate electrode and source/drain regions, thereby achieving an improvement in signal-to-noise ratio. The method uses a impurity ion doping process and a process for forming a silicide layer using a refractory metal, so as to form source and drain electrodes in a self-aligned manner, with respect to the gate electrode. In order to avoid a channel overlap from occurring between the gate electrode and the source and drain electrodes, a photoresist pattern is subjected to a baking, which photoresist pattern defines an insulating layer pattern serving as a channel passivation layer to determine the of a channel region and the widths of source and drain regions. By the baking, the photoresist pattern flows outwardly so that its width is approximately equal to the length of the gate electrode.

REFERENCES:
patent: 5010027 (1991-04-01), Possin et al.
patent: 5130263 (1992-07-01), Possin et al.
Nishida et al., A New Self-Aligned A-Si TFT Using Ion Doping And Chromium Silicide Formation, Material Research Society Symp. Proc., vol. 219, pp. 303-308, 1991 (Exhibit 1).

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