Fishing – trapping – and vermin destroying
Patent
1993-12-13
1995-02-28
Fourson, George
Fishing, trapping, and vermin destroying
437101, 437909, 437981, 148DIG127, 148DIG161, H01L 21265
Patent
active
053936825
ABSTRACT:
A new method of forming a tapered polysilicon etching profile in the manufacture of a thin film transistor integrated circuit is described. A layer of polysilicon is deposited over the surface of a semiconductor substrate. Ions are implanted into the polysilicon layer whereby the upper half of the polysilicon layer is damaged by the presence of the ions within the layer. The polysilicon layer is anisotropically etched. The polysilicon layer is isotropically etched whereby the damaged upper portion of the layer is etched faster than is the undamaged lower portion resulting in a tapered polysilicon layer. A layer of gate oxide is deposited over the surface of the tapered polysilicon layer. Then the thin film transistor body is formed. A layer of amorphous silicon is deposited over the surface of the gate oxide layer. The amorphous silicon layer is recrystallized to yield larger grain sizes. Channel and source/drain regions are formed within the recrystallized amorphous silicon layer to complete formation of the thin film transistor body. An insulating layer is deposited over the thin film transistor body and the silicon substrate. Contact openings are made through the insulating layer to the source/drain regions and filled with a conductive material to complete the contacts completing the formation of the thin film transistor integrated circuit.
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Booth Richard A.
Fourson George
Saile George O.
Taiwan Semiconductor Manufacturing Company
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