Method of making SOI circuit with buried connectors

Details Method of making SOI circuit with buried connectors Method of making SOI circuit with buried connectors

1991-11-12

1992-09-08

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 61, 437 62, 437 69, 437 70, 437 26, H01L 2176

Patent

active

051458020

ABSTRACT:
An SOI circuit includes a set of buried body ties that provide ohmic contact to the otherwise floating transistor bodies disposed on an insulating layer and both provide a path for holes generated by impact ionization and also act as a potential shield between the substrate potential and the transistor sources. The same fabrication technique provides a buried interconnect layer between transistors that can be employed as a mask programmable local interconnect in an ASIC such as a gate array. The process provides for independent control of differential mesa thickness and buried body tie thickness, so that fully and partially depleted transistors can be fabricated simultaneously and placed on appropriate mesas without affecting the body ties.

REFERENCES:
patent: 4523963 (1985-06-01), Ohta et al.
patent: 4778775 (1988-10-01), Tzeng
patent: 4948742 (1990-08-01), Nishimura et al.

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