Method of making single polysilicon self-aligned transistor

Details Method of making single polysilicon self-aligned transistor Method of making single polysilicon self-aligned transistor

1988-06-28

1989-06-13

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 31, 437 89, 437162, 437228, 357 34, 357 59, H01L 21265

Patent

active

048393053

ABSTRACT:
A self-aligned, single polysilicon transistor is fabricated using nitride spacers (26, 68) to self-align the extrinsic base regions ( 48,80). The space between the base contacts (36,76) and the emitter contacts (34,78) is defined by the width of the nitride spacer plug (26,68) less the oxide encroachment from a thermal oxidation of the underlying polysilicon.

REFERENCES:
patent: 4331708 (1982-05-01), Hunter
patent: 4502914 (1985-03-01), Trumpp et al.
patent: 4610730 (1986-09-01), Harrington et al.
patent: 4640721 (1987-02-01), Uehara et al.
patent: 4716126 (1987-12-01), Cogan
"Semiconductor Enhancement for High Speed Logic", IBMTDB, vol. 28, No. 11, Apr. 1986, pp. 5014-5016.

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