Fishing – trapping – and vermin destroying
Patent
1987-04-06
1989-09-05
Hearn, Brian E.
Fishing, trapping, and vermin destroying
148DIG77, 148DIG81, 148DIG118, 148DIG150, 156613, 437 62, 437 83, 437 82, 437915, 437973, H01L 21263, H01L 754, H01L 2176
Patent
active
048638781
ABSTRACT:
The described embodiments of the present invention provide a semiconductor on insulator structure providing a semiconductor layer less susceptible to single event upset errors (SEU) due to radiation. The semiconductor layer is formed by implanting ions which form an insulating layer beneath the surface of a crystalline semiconductor substrate. The remaining crystalline semiconductor layer above the insulating layer provides nucleation sites for forming a crystalline semiconductor layer above the insulating layer. The damage caused by implantation of the ions for forming an insulating layer is left unannealed before formation of the semiconductor layer by epitaxial growth. The epitaxial layer, thus formed, provides superior characteristics for prevention of SEU errors, in that the carrier lifetime within the epitaxial layer, thus formed, is less than the carrier lifetime in epitaxial layers formed on annealed material while providing adequate semiconductor characteristics.
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Ghandhi, "VLSI Fabrication Principles", John Wiley and Sons, New York, N.Y. 1983, p. 570.
Hite Larry R.
Houston Ted
Matloubian Mishel
Anderson Rodney M.
Bunch William D.
Hearn Brian E.
Heiting Leo N.
Sharp Melvin
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