Method of making semiconductor wafers

Details Method of making semiconductor wafers Method of making semiconductor wafers

1994-05-27

1996-02-27

Fourson, George

Fishing, trapping, and vermin destroying

1566361, 1566511, H01L 21304

Patent

active

054948622

ABSTRACT:
A method for a flatter semiconductor wafer free of ORP-observed irregularity and particles generated in handling on the back side of the wafer, in which an alkaline etching is adopted to utilize its advantage and a slight polishing step is combined to a conventional method of this kind. A deficiency of alkaline etching which brings about rougher surface irregularities on the surface of a wafer is eliminated by the use of the step of slight polishing on the back surface after the etching step and the inherent advantage stands without a loss, so that particle generation from the back surface of a semiconductor wafer in handling is much reduced and what's more a flatter semiconductor wafer is realized and a yield of an electronic device fabrication is increased.

REFERENCES:
patent: 4276114 (1981-06-01), Takano et al.
patent: 4343662 (1982-08-01), Gay
patent: 4588473 (1986-05-01), Hisatomi et al.
patent: 5227339 (1993-07-01), Kishii
patent: 5320706 (1994-06-01), Blackwell
Basi, J., et al, "Controlled Wafer Backside Polishing", IBM Tech. Disc. Bull. vol. 21, No. 7, Dec. 1978, p. 2733.

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