Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Insulative housing or support
Reexamination Certificate
2011-03-01
2011-03-01
Nguyen, Khiem D (Department: 2823)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Insulative housing or support
C438S127000, C438S612000, C257S690000, C257S693000, C257SE21511
Reexamination Certificate
active
07897438
ABSTRACT:
A semiconductor package and method for making a semiconductor package are disclosed. The semiconductor package has a top surface and a mounting surface and includes a die, a conducting connecting material, a plating material and an insulating material. The die has a processed surface facing towards the mounting surface of the semiconductor package. Exposed metal connections are at the processed surface of the die. The conducting connecting material is disposed on the exposed metal connections. The plating material is in contact with the conducting connecting material. The insulating material is formed around the conducting connecting material, and the plating material extends to the exterior of the insulating material.
REFERENCES:
patent: 6365432 (2002-04-01), Fukutomi et al.
patent: 6667557 (2003-12-01), Alcoe et al.
patent: 6774466 (2004-08-01), Kajiwara et al.
patent: 6927096 (2005-08-01), Shimanuki
Liu Kai
Luo Leeshawn
Sun Ming
Zhang Xiao Tian
Alpha and Omega Semiconductor Incorporated
Nguyen Khiem D
Van Pelt & Yi & James LLP
LandOfFree
Method of making semiconductor package with plated connection does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of making semiconductor package with plated connection, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of making semiconductor package with plated connection will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2753221