Method of making semiconductor integrated circuit, pattern detec

Details Method of making semiconductor integrated circuit, pattern detec Method of making semiconductor integrated circuit, pattern detec

1989-02-21

1992-03-10

Rosenberger, Richard A.

Optics: measuring and testing

By alignment in lateral direction

With registration indicia

H01L 2130

Patent

active

050945394

ABSTRACT:
According to the present invention, in making alignment between a semiconductor integrated circuit wafer and a mask or a reticle in light exposure of the wafer with a monochromatic light such as g-, i- or h- line of a mercury lamp, using a reduced stepping exposure system, light from a predetermined pattern on the wafer is taken out to an off-axis position and observed according to a through-the-lens method; in this case as a characteristic feature of the invention, the observation light is taken out from below the reticle and is passed through chromatic aberration correcting lenses, thereby permitting the use of a polychromatic or continuous spectrum light.

REFERENCES:
patent: 4492459 (1985-01-01), Omata
patent: 4668089 (1987-05-01), Oshida et al.

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