Metal working – Method of mechanical manufacture – Assembling or joining
Patent
1981-10-07
1983-10-18
Andrews, M. J.
Metal working
Method of mechanical manufacture
Assembling or joining
29576R, 29577R, H01L 2122, H01L 21306, H01L 2976
Patent
active
044097255
ABSTRACT:
A method of making a semiconductor integrated circuit on a semiconductor substrate containing thereon an SIT and an IG(MOS) FET or an SIT and C-MOS FETs, comprises a series of steps of making these functional semiconductor devices many of which steps are rendered to be common to the SIT and the FET. The gate region of said IG(MOS) FET is formed as a semiconductor gate layer which typically is made of polycrystalline silicon, and an active semiconductor area of said IG(MOS) FET is formed by using this semiconductor gate layer as the mask therefor.
REFERENCES:
patent: 4046605 (1977-09-01), Nelson et al.
patent: 4049476 (1977-09-01), Horie
patent: 4325180 (1982-04-01), Curran
Hotta Tadahiko
Nonaka Terumoto
Andrews M. J.
Hey David A.
Nippon Gakki Seizo Kabushiki Kaisha
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