Semiconductor device manufacturing: process – Forming bipolar transistor by formation or alteration of... – Complementary bipolar transistors
Reexamination Certificate
2006-04-25
2006-04-25
Lebentritt, Michael (Department: 2812)
Semiconductor device manufacturing: process
Forming bipolar transistor by formation or alteration of...
Complementary bipolar transistors
C438S313000
Reexamination Certificate
active
07033899
ABSTRACT:
A method for fabricating semiconductor device is provided. A high stress layer formed on, under or on both sides of the transistors of the semiconductor device is employed as a cap layer. A specific region is then defined through photo resistor mask, and the stress of the region is changed by ion implanting. Therefore, compressive stress and tensile stress occur on the high stress layer. According the disclosed method, the high stress layer may simultaneously improve the characteristics of the transistors formed on the same wafer. Further, the mobility of the carriers of the device is enhanced.
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patent: 6146972 (2000-11-01), Yamamoto
patent: 6780725 (2004-08-01), Fujimaki
patent: 2003/0219952 (2003-11-01), Fujimaki
patent: 2005/0013151 (2005-01-01), Nathanson et al.
“Local Mechanical-Stress Control (LMC): A New Technique for CMOS-Performance Enhancement”, A. Shimizu et al.; Hitachi ULSI Systems, Co., Ltd.; IEEE 2001; pp. 19.4.1-19.4.4.
Hsieh Wen-Yi
Lin Cha-Hsin
Lu Shing-Chii
Pei Zing-Way
Industrial Technology Research Institute
Lebentritt Michael
Rabin & Berdo P.C.
Stevenson Andre′ C.
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