Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Metallic housing or support
Reexamination Certificate
1999-11-19
2001-09-18
Picardat, Kevin M. (Department: 2823)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Metallic housing or support
C438S126000, C438S613000, C438S614000
Reexamination Certificate
active
06291271
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to methods of making a semiconductor chip package, and more specifically to methods of making a low-pin-count chip package by a film carrier.
2. Description of the Related Art
FIG. 1
is a low-pin-count chip package
100
according to a preferred embodiment disclosed in R. O. C. Publication No. 348306 entitled “Device Having Resin Package And Method Of Producing The Same”. The low-pin-count chip package
100
includes a chip
110
sealed in a package body
120
. The active surface of the chip
110
is provided with a plurality of bonding pads
110
a
electrically connected to a plurality of connection pads
130
. The backside surface of the chip
110
is exposed from the package body
120
through a conductive adhesive layer
112
. The connection pads
130
are located around the chip
110
and exposed from the lower surface of the package body
120
for making external electrical connection. The chip package
100
can be mounted onto a substrate, such as a printed circuit board, like other leadless devices.
R. O. C. Publication No. 348306 also discloses a method of producing the low-pin-count chip package
100
. The method mainly utilizes a metallic frame
170
(as shown in
FIG. 2
) to produce a plurality of the chip packages
100
simultaneously. The method includes: (A) forming a photoresist layer over the metallic frame
170
, transferring the desired pattern, and developing in a manner that areas on the metallic frame
170
corresponding to the connection pads
130
are not covered by the photoresist layer. (B) Electroplating areas on the metallic frame
170
which are not covered by the photoresist layer with a layer of metal such as gold or platinum thereby forming the plurality of connection pads
130
. (C) Removing the photoresist layer. (D) Securely attaching the backside surface of the chip
110
to the metallic frame
170
through an adhesive layer. (E) Electrically coupling the bonding pads of the chip
110
to the corresponding connection pads
130
. (F) Forming a package body over the chip
110
. Finally, a separation process is taken to remove the metallic frame
170
. As shown in
FIG. 2
, the separation process typically is done by utilizing an etching agent to selectively dissolve the metallic frame
170
, with the connection pads
180
undissolved.
The method of making the low-pin-count chip package
100
described above utilizes the metallic frame
170
to support the chip
110
during the assembly process, and then the metallic frame
170
needs to be removed by etching agent. Therefore, the method is quite complicated, expensive and time-consuming.
SUMMARY OF THE INVENTION
It is a primary object of the present invention to provide a method of making a semiconductor chip package which utilizes a film carrier to support a semiconductor chip for making a low-pin-count chip package.
It is another object of the present invention to provide a method of making a semiconductor chip package utilizing a film carrier to support a semiconductor chip to make the chip package wherein the film carrier is directly removed eventually; hence, the method becomes simplified, cost-saving and time-saving.
It is still another object of the present invention to provide a method of making a semiconductor chip package wherein the bottom of the chip and the connection pads is exposed from the semiconductor chip package thereby enhancing the thermal performance of the chip.
A method of making a low-pin-count chip package according to a first embodiment of the present invention comprises the steps of: (A) providing a film carrier; (B) forming a plurality of through-holes in the film carrier; (C) laminating a metal layer on the film carrier; (D) etching the metal layer to form a die pad and a plurality of connection pads around the die pad, wherein the connection pads are disposed corresponding to the through-holes; (E) forming a metal coating on the surfaces of the die pad and the connection pads which are not covered by the film carrier; (F) attaching a semiconductor chip to the die pad, the semiconductor chip having a plurality of bonding pads; (G) electrically coupling the bonding pads of the semiconductor chip to the connection pads; (H) forming a package body over the film carrier, the die pad, the connection pads and the semiconductor chip; and (I) removing the film carrier to expose the lower surface of the die pad and the connection pads.
Another method of making a low-pin-count chip package according to a second embodiment of the present invention comprises the steps of: (A) providing a film carrier having a die receiving area; (B) forming a plurality of through-holes in the film carrier; (C) laminating a metal layer on the film carrier; (D) etching the metal layer to form a plurality of connection pads disposed corresponding to the through-holes; (E) forming a metal coating on the surfaces of the connection pads which are not covered by the film carrier; (F) attaching a semiconductor chip to the die receiving area of the film carrier by an adhesive layer, the semiconductor chip having a plurality of bonding pads; (G) electrically coupling the bonding pads of the semiconductor chip to the connection pads; (H) forming a package body over the film carrier, the connection pads and the semiconductor chip; and (I) removing the film carrier to expose the adhesive layer on the backside surface of the chip and the lower surface of the connection pads.
Since the method of making a chip package in accordance with the present invention utilizes a film carrier to support a semiconductor chip during the assembly process and the film carrier can be directly removed eventually, the method becomes simplified, cost-saving and time-saving. Since the film carrier is removed eventually, the film carrier may be made of cheaper material such as resin film, rather than expensive material like polyimide having properties that allow it to pass reliability tests, thereby effectively reducing the manufacturing cost. Besides, the die pad is exposed from the semiconductor chip package after the removal of the film carrier such that the heat-dissipating efficiency is enhanced.
REFERENCES:
patent: 5402006 (1995-03-01), O'Donley
patent: 5872051 (1999-02-01), Fallon et al.
patent: 5894108 (1999-04-01), Mostafazadeh et al.
“Adhesion Enhancement of Pd Plated Leadframes”, by C.Q. Cui et al, ECTC 49th, 1999, Session 23.
R.O.C. Publication No. 348306 entitled “Device Having Resin Package and Method of Producing The Same”.
Hsu Kao-Yu
Lee Chun-Chi
Advanced Semiconductor Engineering Inc.
Collins D. M.
Picardat Kevin M.
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