Semiconductor device manufacturing: process – Having magnetic or ferroelectric component
Reexamination Certificate
2002-01-15
2003-10-28
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Having magnetic or ferroelectric component
C438S680000, C365S173000
Reexamination Certificate
active
06638774
ABSTRACT:
TECHNICAL FIELD
The present invention relates generally to the fabrication of semiconductor devices, and more particularly to the fabrication of magnetic random access memory (MRAM) devices.
BACKGROUND OF THE INVENTION
Semiconductors are used for integrated circuits for electronic applications, including radios, televisions, cell phones, and personal computing devices, as examples. One type of semiconductor device is a semiconductor storage device, such as a dynamic random access memory (DRAM) and flash memory, which use a charge to store information.
A more recent development in memory devices involves spin electronics, which combines semiconductor technology and magnetics. The spin of an electron, rather than the charge, is used to indicate the presence of a “1” or “0”. One such spin electronic device is an MRAM, which includes conductive lines positioned substantially perpendicular to one another in different metal layers, the conductive lines sandwiching a magnetic stack. The place where the conductive lines intersect is called a cross-point. A current flowing through one of the conductive lines generates a magnetic field around the conductive line and orients the magnetic polarity into a certain direction along the wire or conductive line. A current flowing through the other conductive line induces the magnetic field and can partially turn the magnetic polarity, also. Digital information, represented as a “0” or “1”, is storable in the alignment of magnetic moments. The resistance of the magnetic component depends on the moment's alignment. The stored state is read from the element by detecting the component's resistive state. A memory cell may be constructed by placing the conductive lines and cross-points in a matrix structure having rows and columns.
An advantage of MRAM's compared to traditional semiconductor memory devices such as DRAM's is that MRAM's are non-volatile. For example, a personal computer (PC) utilizing MRAM's would not have a long “boot-up” time as with conventional PCs that utilize DRAM's. Also, an MRAM does not need to be powered up and has the capability of “remembering” the stored data.
Because resistive memory devices such as MRAM's are relatively new types of memory devices, they present a variety of manufacturing and material challenges. For example, improved methods of forming resistive memory elements are needed.
SUMMARY OF THE INVENTION
Preferred embodiments of the present invention achieve technical advantages as a resistive memory element and method of manufacturing thereof that includes a thin oxide layer within the magnetic stack hard layer that reduces roughness of the resistive memory element.
In one embodiment, disclosed is a resistive memory element for a resistive memory device, comprising a first metal layer including a first metal portion comprising at least one magnetic metal layer. The first metal layer includes a thin oxide layer disposed over the first metal portion, and a second metal portion disposed over the thin oxide layer, the second metal portion comprising a plurality of magnetic metal layers. The resistive memory element includes a tunnel junction and a second metal layer, the second metal layer including a plurality of magnetic metal layers.
In another embodiment, disclosed is a resistive semiconductor memory device, comprising a plurality of first conductive lines positioned parallel to one another in a first direction and a plurality of resistive memory elements disposed over the first conductive lines. The resistive memory elements comprise a first metal layer including a first metal portion comprising at least one magnetic metal layer. The first metal layer includes a thin oxide layer disposed over the first metal portion, and a second metal portion disposed over the thin oxide layer. The second metal portion comprises a plurality of magnetic metal layers. The resistive semiconductor memory device includes a tunnel junction disposed over the first metal layer, and a second metal layer disposed over the tunnel junction, the second metal layer including a plurality of magnetic metal layers. A plurality of second conductive lines are disposed over the resistive memory elements, the second conductive lines being positioned parallel to one another in a second direction.
In another embodiment, disclosed is a method of manufacturing resistive memory elements of a resistive memory device, comprising providing a substrate, disposing a first metal layer first portion over the substrate, and forming a thin oxide layer over the first metal layer first portion. The method includes disposing a first metal layer second portion over the thin oxide layer, forming a tunnel layer over the first metal layer second portion, and disposing a second metal layer over the tunnel layer, wherein the second metal and first metal layers comprise a plurality of ferromagnetic metal layers.
In another embodiment, disclosed is a method of manufacturing a resistive memory device, comprising providing a semiconductor substrate, forming a plurality of a plurality of first conductive lines parallel to one another in a first direction over the substrate, and disposing a plurality of resistive memory elements over the first conductive lines, the resistive memory elements including a first metal layer having a thin oxide layer disposed therein. A plurality of second conductive lines are formed over the resistive memory elements, the second conductive lines being positioned parallel to one another in a second direction.
Advantages of embodiments of the invention include reducing the roughness of the ferromagnetic layers and tunneling layers of magnetic stacks. Reduced roughness of the layers above the thin oxide layer results in the reduction or elimination of Neel coupling that is problematic in prior art resistive memory elements. The thin oxide layer within the first metal layer provides the ability to manufacture a resistive memory element with a more predictable resistance than in the prior art. More uniform growth of the barrier layer is provided, and magnetic properties of magnetic resistive elements are also enhanced.
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Infineon - Technologies AG
Nelms David
Nguyen Thinh T.
Slater & Matsil L.L.P.
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