Metal working – Method of mechanical manufacture – Assembling or joining
Patent
1978-03-20
1981-09-22
Roy, Upendra
Metal working
Method of mechanical manufacture
Assembling or joining
29578, 29584, 148 15, 357 45, 357 91, G11C 1140, H01L 744, H01L 2710, B01J 1700
Patent
active
042901847
ABSTRACT:
An MOS read only memory or ROM is formed by a process compatible with standard N-channel silicon gate manufacturing methods. The ROM is programmed after the top level of contacts and interconnections, usually metal, has been deposited and patterned. Address lines and gates are polysilicon, and output and ground lines are defined by elongated N+ regions. Each potential MOS transistor in the array is programmed to be a logic "1" or "0" by ion implanting through the polysilicon gates and thin gate oxide, using patterned protective oxide as a mask, or using photoresist as a mask prior to application of protective oxide.
REFERENCES:
patent: 3377513 (1968-04-01), Ashby
patent: 3384879 (1968-05-01), Stahl
patent: 3747203 (1973-07-01), Shannon
patent: 3865651 (1975-02-01), Arita
patent: 3887994 (1975-06-01), Ku
patent: 3914855 (1975-10-01), Cheney
patent: 4059826 (1977-11-01), Rogers
patent: 4129936 (1978-12-01), Takei
Graham John G.
Roy Upendra
Texas Instruments Incorporated
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