Method of making oxide-isolated source/drain transistor

Details Method of making oxide-isolated source/drain transistor Method of making oxide-isolated source/drain transistor

1989-10-03

1990-10-16

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 40, 437 52, 437 56, 437162, 437203, 437228, H01L 21336

Patent

active

049635026

ABSTRACT:
A MOS bulk device having source/drain-contact regions 36 which are almost completely isolated by a dielectric 35. These "source/drain" regions 36 are formed by using a silicon etch to form a recess, lining the etched recess with oxide, and backfilling with polysilicon. A short isotropic oxide etch, followed by a polysilicon filament deposition, then makes contact between the oxide-isolated source/drain-contact regions 36 and the channel region 33 of the active device. Outdiffusion through the small area of this contact will form small diffusions 44 in silicon, which act as the electrically effective source/drain regions. Use of sidewall nitride filaments 30 on the gate permits the silicon etch step to be self-aligned.

REFERENCES:
patent: 4503598 (1985-03-01), Vora et al.
patent: 4604150 (1986-08-01), Lim
patent: 4676847 (1987-01-01), Lim
patent: 4683637 (1987-08-01), Varker et al.

Affiliated with

Also associated with

Rating

Method of making oxide-isolated source/drain transistor does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of making oxide-isolated source/drain transistor, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of making oxide-isolated source/drain transistor will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-849673