Method of making non-trenched buried contact for VLSI devices

Details Method of making non-trenched buried contact for VLSI devices Method of making non-trenched buried contact for VLSI devices

1994-06-13

1995-01-10

Fourson, George

Fishing, trapping, and vermin destroying

437917, 437203, 257752, H01L 21336, H01L 2176

Patent

active

053806719

ABSTRACT:
The invention describes a non-trenched buried contact for local interconnections in VLSI devices and provides a method for forming the non-trenched buried contact. By using trenched isolation and a trench polysilicon gate structure the buried contact process can be implemented so that there are no unwanted trenches formed in the area of the buried contact. The invention permits excellent planarization of the device prior to pre-metal dielectric and metal deposition.

REFERENCES:
patent: 4945070 (1990-07-01), Hsu
patent: 4963502 (1990-10-01), Teng et al.
patent: 5057902 (1991-10-01), Haskell
patent: 5196368 (1993-03-01), Thompson et al.
patent: 5216282 (1993-06-01), Cote et al.
"Simulation of Sub-0.1-.mu.m MOSFET's with Completely Suppressed Short-Channel Effect" by Tanaka et al., IEEE Electron Device Letters, Aug. 1993.

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