Single-crystal – oriented-crystal – and epitaxy growth processes; – Forming from vapor or gaseous state – With decomposition of a precursor
Reexamination Certificate
2002-01-16
2003-05-13
Hiteshew, Felisa (Department: 1765)
Single-crystal, oriented-crystal, and epitaxy growth processes;
Forming from vapor or gaseous state
With decomposition of a precursor
C117S097000, C117S915000, C438S455000, C438S456000, C438S457000, C438S458000
Reexamination Certificate
active
06562127
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to structure and method for making a laterally tiled array of thin single-crystal material substrates that are bonded to the surface of a large diameter handle substrate.
2. Description of Related Art
There are many single-crystal substrates that are only available in small size and are also quite expensive. For example, the cost of a 50 mm diameter conductive SiC substrate is approximately $1000. The cost for a 50 mm diameter semi-insulating SiC substrate is approximately $5000. Another important issue is that small size substrates are not compatible with factory processing equipment in modern silicon or GaAs integrated circuit processing foundry. Most silicon processing facilities currently use either 150 mm or 200 mm diameter substrate dimension. GaAs processing facilities typically use 100 mm to 150 mm diameter substrate dimensions. Examples of other single-crystal materials that are expensive and are generally available in small substrate sizes are CdTe, CdZnTe, ZnO, GaSb, GaP, InAs, MgO, LaAlO
3
, BaTiO3, SrTiO
3
, MgO, LiNbO
3
, LiTaAl, SrBaNbO
3
, crystalline metal, and highly oriented pryolitic graphite.
Both single-crystal and non-single-crystalline large diameter substrates can be used as handle substrates for the tiled array of thin single-crystal material layers. Examples of single-crystal substrates that have diameters of three inches or larger are: silicon, GaAs, sapphire, InP, GaP, LiNbO3, and germanium.
Non-single-crystalline ceramic substrates can be designed to have optimized mechanical, thermal expansion, thermal conduction, or electrical conduction properties and can generally be obtained as large diameter substrates as describe in U.S. patent application Ser. No. 09/243,182 now U.S. Pat. No. 6,328,796. One polycrystalline ceramic substrate that has especially desirable properties is poly-SiC. Poly-SiC substrates are manufactured commercially in hot pressed, reaction bonded, and chemical vapor deposited (CVD) form. The CVD poly-SiC substrates are available commercially in substrate sizes up to 200 mm diameter, with thermal impedance as high as 310 W/mK, electrical resistivity as high as 100,000 ohm-cm, electrical impedance as low as 1 ohm-cm, melting temperature of 2000° C., and thermal expansion comparable to single-crystal cubic-SiC. Hot pressed sintered poly-SiC substrates are commercially available that have many of the above characteristics, but with electrical impedances as low as 0.1 ohm-cm. Ceramic AlN substrates are available commercially is substrate sizes to 100 mm square, with thermal impedances as high as 170 W/mK, electrical resistivity as high as 10
14
ohm-cm at room temperature, and excellent thermal expansion matching to single-crystal GaN. Polycrystalline diamond has thermal conductivity as high as 1000 W/mK. Ceramic silicon nitride has good thermal expansion matching to silicon. Ceramic graphite substrates are available with electrical impedances as small as 0.01 ohm-cm. AlSiC substrates are commercially available, and have good expansion matching to silicon.
Wide bandgap gallium nitride (GaN) material has recently been demonstrated to be very beneficial for microwave power transistor applications, and for blue-green laser and light emitting diodes (LED). GaN epitaxial layers have typically been grown on a sapphire substrate and on single-crystal SiC substrates. There are continuing searches for new substrates for GaN growth. Sapphire is electrically insulating, a disadvantage for vertical current conducting optical emitters and power devices, and has relatively high thermal impedance which is a disadvantage for high power microwave devices. The best quality GaN epitaxial layers have been obtained for material grown on SiC substrates; however, single-crystal SiC substrates are very expensive and are only available in small substrate sizes. A recent technique that has shown improved GaN material quality is the lateral epitaxial overgrowth (LEO) technique on SiC or sapphire substrates.
An important substrate material for infrared imagers is either CdTe or CdZnTe substrate material. The largest substrate size that is generally available is 50 mm×50 mm square. HgCdTe material is typically epitaxially grown on the CdTe or CdZnTe material to implement midwave and long wavelength infrared detectors. Because of the size limitation, there has been significant research performed to grow HgCdTe directly on a silicon substrate. Some of the advantages of the growth of HgCdTe material on silicon substrate are larger substrate size, thermal expansion match of HgCdTe detector on silicon-to-silicon readout circuits, flat wafers for improved bump bonding yield, and substrate size that is compatible integrated circuit processing equipment. While it has been demonstrated that HgCdTe material can be grown on (211) silicon with sufficient material quality for midwave infrared focal plane array (IRFPA), the material quality is not yet satisfactory for long wavelength IRFPA. The normal configuration for an infrared focal plane array is to bump bond the infrared imager to a silicon readout integrated circuit. In this configuration, the infrared imager is illuminated from the backside. Thus, it is desirable that the substrate upon which the infrared absorbing material is grown be transmissive in the infrared. An important substrate material for midwave infrared detectors arrays is InSb. In the typical infrared focal plane array configuration, InSb infrared detector array is bump bonded to a silicon readout integrated circuit and then the InSb is thinned to approximately 10 micron thickness to allow back-illumination of the infrared focal plane array.
There are a number of light emitting devices (LED) that are made using III-V materials, SiC, GaN, InGaN or ZnS materials. It is sometimes desirable to fabricate the LEDs on an optically transparent substrate so that the light emission can pass through the substrate.
An important requirement for microwave integrated circuits is that the transistors be fabricated on an insulating substrate. An insulating substrate is important to obtain low loss transmission lines and inductors with high quality factor. There are some materials such as InAs and InSb that have transistors with excellent high frequency properties; however, the conductivity of the substrate is generally too high to allow microwave transmission lines and inductors.
A provisional patent application filed on Jun. 30, 1998 by Kub and Hobart, U.S. Pat. No. 6,323,108, discussed several techniques to make ultra-thin wafer bonded material layers. U.S. Pat. No. 5,374,564 to M. Bruel describes another method of fabricating thin wafer bonded semiconductor layer that involves combining wafer bonding with a hydrogen implantation and separation technique. The hydrogen implantation and separation technique utilizes a large dose of implanted hydrogen together with subsequent annealing to produce hydrogen exfoliation that releases the host substrate to generate the silicon-on-insulator (SOI) structure. The surface following exfoliation has a microroughness of about 8 nm, and must be given a slight chemical mechanical polish to produce a prime surface. The polishing step degrades the Si layer thickness uniformity and makes the process unsuitable for producing very thin Si film.
It has been found experimentally that there are a number of techniques to either reduce the required hydrogen ion implantation dose or to reduce the temperature needed to cause hydrogen ion implantation substrate layer splitting process to work. One technique involves the use of a high-pressure nitrogen gas steam directed towards the side of a silicon substrate into which a high dose hydrogen ion implantation has been made. It has been experimentally found that the hydrogen ion implantation substrate layer splitting process can occur at room temperature for the case of a silicon substrate into which a high hydrogen ion implantation dose has been made using the high-pressure nitrogen gas stream metho
Hobart Karl
Kud Francis
Spencer Mike
Hiteshew Felisa
Kap George A.
Karasek John J.
The United States of America as represented by the Secretary of
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