Method of making MIS-field effect transistor having a short chan

Details Method of making MIS-field effect transistor having a short chan Method of making MIS-field effect transistor having a short chan

1981-03-30

1983-05-10

Roy, Upendra

Metal treatment

Compositions

Heat treating

29571, 29578, 148187, 357 91, B01J 1700

Patent

active

043828264

ABSTRACT:
An MIS-field effect transistor comprising a semiconductor member provided with an overlying insulating layer and having a source zone and a drain zone of a first conductivity type provided with respective contacting electrodes, and a gate-electrode layer disposed therebetween, with each of said areas being surrounded by a less heavily doped area of the same conductivity type. At the source side, an additional area abuts the source zone and extends to the semiconductor surface beneath the gate-electrode layer, forming a channel having a very short length. The various dopings having different penetration depths are produced by differential implantation. A windowed mask, having windows with beveled edges at the drain-zone and the source zone, is utilized as an implantation mask, which advantageously is formed by the insulating layer and/or by the gate-electrode layer. Such a field effect transistor is particularly suited for integrated semiconductor circuits due to its high breakdown voltage and high switching speed resulting from the short channel length.

REFERENCES:
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patent: 4038107 (1977-07-01), Marr et al.
patent: 4078947 (1978-03-01), Johnson et al.
patent: 4091405 (1978-05-01), Ishida
patent: 4104085 (1978-08-01), Zandveld
patent: 4143388 (1979-03-01), Esaki et al.
patent: 4190850 (1980-02-01), Tihanyi et al.
patent: 4258465 (1981-03-01), Yasui et al.
Alcorn et al., IBM-TDB, 22 (1979, Oct.), 1973.

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