Method of making metal-insulator-metal junction structures with

Details Method of making metal-insulator-metal junction structures with Method of making metal-insulator-metal junction structures with

1990-04-20

1991-05-28

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437176, 437177, 437178, 437179, 357 6, 357 7, 357 15, 148DIG139, 148DIG140, 148DIG142, H01L 2956

Patent

active

050195301

ABSTRACT:
A method and structures are described for fabricating junctions having metal electrodes separated by polycrystalline barriers with arbitrarily-chosen but controlled barrier height and shape is accomplished by varying the composition and doping of polycrystalline multinary compound semiconductor materials in the barrier, hence varying the Fermi level pinning position such that the Fermi level is fixed and controlled at and everywhere in between the two metal-insulator interfaces. It is known that Schottky barrier heights at metal/compound semiconductor interfaces are determined by a Fermi level pinning mechanism rather than by the electronic properties of the applied metallurgy. The present invention exploits the knowledge that the same type of Fermi level pinning occurs at semiconductor dislocations and grain boundaries. The present invention uses polycrystalline compound semiconductor alloys in which the pinning position is varied over a large range in metal/semiconductor structures. The structures are composed of sandwiches of metal, compound semiconductor and metal. Tunneling currents are determined by barrier height, controlled by semiconductor alloy composition, and semiconductor thickness. The energy barrier in the polycrystalline material can be uniform throughout, due to the uniformity of pinning position at both the metal/semiconductor interface and the grain boundaries.

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