Method of making integrated circuit MOS capacitor using implante

Metal working – Method of mechanical manufacture – Assembling or joining

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Details

29577C, 29576B, H01L 744, B01J 1700

Patent

active

042952646

ABSTRACT:
An MOS capacitor for N-channel silicon gate integrated circuits employs a polycrystalline silicon layer as one plate, and a silicon oxide dielectric. The lower plate consists of a region which is implanted by an ion beam to produce a depleted region. This device has a constant capacitance regardless of gate voltage in normal operating logic levels.

REFERENCES:
patent: 3387286 (1968-06-01), Dennard
patent: 3865654 (1975-02-01), Chang
patent: 3889358 (1975-06-01), Bierhenke

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