Method of making high voltage transistor

Fishing – trapping – and vermin destroying

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437 41, 437 29, 257344, H01L 21265

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active

054119014

ABSTRACT:
In a method for constructing a semiconducting device, within a substrate of a first conductivity type there is formed a well of second conductivity type. Within the well, an extended drain region of a first conductivity type is formed. An insulating region over the extended drain region is formed. A gate region is formed on a surface of the substrate. A first side of the gate region is adjacent to a first end of the extended drain region. A drain region of the first conductivity type is formed. The drain region is in contact with a second end of the extended drain region. A source region is formed on a second side of the gate region.

REFERENCES:
patent: 4721986 (1988-01-01), Kinzer
patent: 4811075 (1989-03-01), Eklund
patent: 4978626 (1990-12-01), Poon et al.
patent: 5023678 (1991-06-01), Kinzer
patent: 5237193 (1993-08-01), Williams et al.
Rumennik et al., "Integrated High and Low Voltage CMOS Technology" IEEE 28th Int. Electron Devices Meeting, pp. 77-80, 1982.

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