Fishing – trapping – and vermin destroying
Patent
1994-02-16
1996-03-19
Fourson, George
Fishing, trapping, and vermin destroying
437918, 437919, H01L 218242
Patent
active
055003877
ABSTRACT:
A method of making an integrated circuit containing a capacitor comprising the steps of providing a semiconductor substrate having an active region and an oxide region on the substrate defining the active region, forming a mask on the active region, forming a region of heavily doped polysilicon on the oxide region having a doping level of from about 10 to about 15 ohms/square, removing the mask from the active region, commencing fabrication of an active device in the active region, forming a layer of electrically insulating material over the region of heavily doped polysilicon and a layer of electrically insulating material over the active region, forming a layer of heavily doped polysilicon having a doping level of from about 10 to about 15 ohms/square on the electrically insulating material to complete fabrication of the capacitor and on the active region and completing fabrication of an active device in the active region. More than one capacitor can be formed, this being accomplished by concurrently duplication of the above described process of forming a capacitor on another region of the substrate. The capacitors can have different capacitance by enlarging the insulating layer thereof, this being accomplished either by removal of oxide from or addition of oxide to one of the capacitors to the exclusion of the other during processing.
REFERENCES:
patent: 4367580 (1983-01-01), Guterman
patent: 4502894 (1985-03-01), Seto et al.
patent: 4898838 (1990-02-01), Morris et al.
patent: 5025741 (1991-06-01), Suwanai et al.
patent: 5198386 (1993-03-01), Gonzalez
Dixon Robert E.
Tung Yingsheng
Ying Shih-Hsin
Booth Richard A.
Brady W. James
Donaldson Richard L.
Fourson George
Hashim Paul C.
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